Power consumption comparison

AN4635

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DocID027290 Rev 1

6.8

ULP bit setting

The role of the ULP bit is to disconnect the internal voltage reference during Stop mode. The

power analysis screen-shot in Figure 9 illustrates that this setting (black line) achieves lower

power consumption in the Stop mode, but produces significant peaks when waking up

(compared to green trace without ULP).

The microcontroller waiting for incoming data in the ULP mode consumes approximately

0,8 µA compared to almost 3 µA without ULP mode, but if it wakes from idle mode too

frequently, the effect is negated by the voltage reference startup peaks.

Figure 9. ULP bit effect

Table 11. Configurations - ULP bit effect

Curve in Figure 9

Black

Green

Idle mode between

transmissions

Stop

JTAG interface

OFF

Current average

over phases 2, 3 and 4

16.29 µA

15.85 µA

Clock

500 kHz MSI

Voltage regulator

Range 3

AHB/APB ratio

1/1

ULP/FWU

+/+

-/-