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LTC1325CSW 데이터시트(PDF) 10 Page - Linear Technology |
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LTC1325CSW 데이터시트(HTML) 10 Page - Linear Technology |
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10 / 24 page ![]() 10 LTC1325 Bit 1: Start Bit (Start) The first “logical one” clocked into the DIN input after CS goes low is the start bit. The start bit initiates the data transfer and all leading zeros which precede this logical one will be ignored. After the start bit is received, the remaining bits of the command word will be clocked in. Bits 2 and 3: Mode Select (MOD0 and MOD1) The two mode bits determine which of four modes the chip will be in: idle, discharge, charge or gas gauge. MOD1 MOD0 DESCRIPTION 0 0 Idle 0 1 Discharge 1 0 Charge 1 1 Gas Gauge Bit 4: Single-Ended Differential Conversion (SGL/DIFF) SGL/DIFF determines whether the ADC makes a single- ended measurement with respect to ground or a differen- tial measurement with respect to the Sense pin. SGL/DIFF DESCRIPTION 0 Single-Ended ADC Conversion 1 Differential ADC Conversion (with respect to Sense) COMMAND WORD The command word is 22 bits long and contains all the information needed to configure and control the chip. On power-up all bits are cleared to logical “0.” FUNCTIONAL DESCRIPTIO START = 1 1 MOD0 2 MOD1 3 SGL/ DIFF 4 MSBF 5 DS0 6 DS1 7 DS2 8 DIV0 9 DIV1 10 DIV2 11 DIV3 12 PS 13 DR0 14 DR1 15 DR2 16 FSCLR 17 TO0 18 TO1 19 TO2 20 VR0 21 VR1 22 LTC1325 • F01 Figure 1. Command Word Bit 5: MSB-First/LSB-First (MSBF) The ADC data is programmed for MSB-first or LSB-first sequence using the MSBF bit. See Serial I/O description for details. MSBF DESCRIPTION 0 LSB-First Data Follows MSB-First Data 1 MSB-First Data Only Bits 6 to 8: ADC Data Input Select (DS0 to DS2) DS2, DS1 and DS0 select which circuit is connected to the ADC input. Do not use unlisted combinations. DS2 DS1 DS0 DESCRIPTION 0 0 0 Gas Gauge Output 0 0 1 Battery Temperature Pin, TBAT 0 1 0 Ambient Temperature Pin, TAMB 0 1 1 Battery Divider Output Voltage, VCELL 10 0 VIN Pin Bits 9 to 12: Battery Divider Ratio Select (DIV0 to DIV3) DIV3, DIV2, DIV1 and DIV0 select the division ratio for the voltage divider across the battery. DIV3 DIV2 DIV1 DIV0 DESCRIPTION 0 0 00(VBAT – VSENSE)/1 0 0 01(VBAT – VSENSE)/2 0 0 10(VBAT – VSENSE)/3 0 0 11(VBAT – VSENSE)/4 0 1 00(VBAT – VSENSE)/5 0 1 01(VBAT – VSENSE)/6 0 1 10(VBAT – VSENSE)/7 0 1 11(VBAT – VSENSE)/8 1 0 00(VBAT – VSENSE)/9 1 0 01(VBAT – VSENSE)/10 1 0 10(VBAT – VSENSE)/11 1 0 11(VBAT – VSENSE)/12 1 1 00(VBAT – VSENSE)/13 1 1 01(VBAT – VSENSE)/14 1 1 10(VBAT – VSENSE)/15 1 1 11(VBAT – VSENSE)/16 |
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