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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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LTC1325CSW 데이터시트(PDF) 23 Page - Linear Technology |
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LTC1325CSW 데이터시트(HTML) 23 Page - Linear Technology |
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23 / 24 page  23 LTC1325 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. LABEL MNEMONIC OPERAND COMMENTS LDAA #$51 Write control byte to the SPCR STAA $1028 LDAA #$39 Setup Port D DDRD STAA $1009 Port D Bit 0 is CS LDX #$1000 Load port base ADDR CSLOW BCLR $08,X,#$01 Take CS low LDAA #$02 Send Byte #1 (MSB) with STAA $102A START bit LOOP1 TST $1029 Check for SPI transfer BPL LOOP1 complete bit LDAA #$24 Send Byte 2 STAA $102A LOOP2 TST $1029 Check for SPI transfer BPL LOOP2 complete bit LDAA #$03 Send Byte 3 STAA $102A LOOP3 TST $1029 Check for SPI transfer BPL LOOP3 complete bit LDAA #$C0 Send Byte 4 STAA $102A TYPICAL APPLICATION LABEL MNEMONIC OPERAND COMMENTS LOOP4 TST $1029 Check for SPI transfer BPL LOOP4 complete bit LDAA $102A Get A/D high byte ANDA #$03 Mask off unwanted bits STAA HIDATA Store in user memory LDAA #$00 Send dummy Byte #1 STAA $102A LOOP5 TST $1029 Check for SPI transfer BPL LOOP5 complete bit LDAA $102A Get A/D low byte STAA LODATA Store in user memory LDAA #$00 Send dummy Byte #2 STAA $102A LOOP6 TST $1029 Check for SPI transfer BPL LOOP6 complete bit LDAA $102A Get STATUS byte STAA STATUS Store in user memory BSET $08,X,#$01 Raise CS high BRA CSLOW Loop for continuous readings APPLICATIONS INFORMATION Wide Voltage Battery Charger NOTE 1: NEEDED WHEN VDC > 16V OR MAXIMUM BATTERY VOLTAGE, VBAT > 16V. NOTE 2: REGULATOR. OMIT THIS BLOCK AND SHORT VDD TO VDC WHEN VDC < 16V. NOTE 3: LEVEL SHIFTER. OMIT THIS BLOCK AND SHORT PGATE TO P1 GATE WHEN VDC < 16V. 1325 TA02 NOTE 7: OPTIONAL DIODE TO PREVENT BATTERY DRAIN WHEN THE CHARGING SUPPLY IS POWERED DOWN (SEE SECTION 2, HARDWARE DESIGN PROCEDURE). RSENSE P1 IRF9Z30 VDC 25V R8 100 Ω CF 1 µF VDD PGATE DIS VBAT TBAT TAMB VIN SENSE FILTER REG DOUT DIN CS CLK LTF MCV HTF GND R1 R11 220 Ω 1/2W R2 R3 R4 + CREG 4.7 µF MPU (e.g. 8051) p1.4 p1.3 p1.2 + C1 1 µF C2 0.1 µF R13 R6 RTRK VBAT RDIS N1 IRF830 C3 500pF THERM 2 R5 LTC1325 THERM 1 R7 L1 62 µH R9 NOTE 5 NOTE 3 NOTE 1 NOTE 1 NOTE 2 R10 D1 1N5818 D3 1N4740A D4 1N4744A 15V R12 100k NOTE 1 NOTE 4 D2 1N4744A 15V NOTE 6 + C4 22 µF R14 100 Ω MBR320 NOTE 7 C5 0.1 µF NOTE 4: ZENER TO CLAMP VBAT TO BELOW VDD. OMIT WHEN VDC < 16V. NOTE 5: EXTERNAL BATTERY DIVIDER. NEEDED WHEN MAXIMUM BATTERY VOLTAGE, VBAT > 16V. NOTE 6: VIN IS AN UNCOMMITTED A/D CHANNEL. |
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