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UPD78P324LP 데이터시트(PDF) 15 Page - NEC |
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UPD78P324LP 데이터시트(HTML) 15 Page - NEC |
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15 / 80 page ![]() µPD78P324, 78P324(A) 15 Figure 1-1. I/O Circuits of Pins Type 1 Type 5 Type 2 Type 8 Type 3 Type 9 Type 4 This is a Schmitt-triggered input which has the hysteresis characteristic. This is the push-pull input which is capable of output high- impedance (off for both P-ch and N-ch). VDD P-ch N-ch IN IN P-ch N-ch OUT VDD P-ch N-ch OUT VDD output disable data IN P-ch N-ch Comparator Vref (Threshold voltage) input enable P-ch N-ch VDD IN/OUT output disable data P-ch N-ch VDD output disable data IN/OUT input disable |
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