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UCD3138128 데이터시트(PDF) 30 Page - Texas Instruments |
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UCD3138128 데이터시트(HTML) 30 Page - Texas Instruments |
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30 / 80 page ![]() A ON SELECT A OFF SELECT B ON SELECT B OFF SELECT EGEN A EGEN B EDGE GEN PWM A PWM B B SELECT A SELECT INTRAMUX A/B/C (N) A/B/C (N+1) C (N+2) C (N+3) A(N) B(N) A(N+1) B(N+1) UCD3138128, UCD3138A64 SLUSBZ8A – JUNE 2014 – REVISED SEPTEMBER 2014 www.ti.com 1 = DPWM(n) A Falling edge 2 = DPWM(n) B Rising edge 3 = DPWM(n) B Falling edge 4 = DPWM(n+1) A Rising edge 5 = DPWM(n+1) A Falling edge 6 = DPWM(n+1) B Rising edge 7 = DPWM(n+1) B Falling edge Where “n" is the numerical index of the DPWM module of interest. For example n=1 refers to DPWM1. The Edge Gen is controlled by the DPWMEDGEGEN register. It also has an enable/disable bit. The IntraMux is controlled by the Auto Config registers. Intra Mux is short for intra multiplexer. The IntraMux takes signals from multiple DPWMs and from the Edge Gen and combines them logically to generate DPWMA and DPWMB signals This is useful for topologies like phase-shifted full bridge, especially when they are controlled with automatic mode switching. Of course, it can all be disabled, and DPWMA and DPWMB will be driven as described in the sections above. If the Intra Mux is enabled, high resolution must be disabled, and DPWM edge resolution goes down to 4 ns. Here is a drawing of the Edge Gen/Intra Mux: Figure 16. Edge Generation / IntraMux Here is a list of the IntraMux modes for DPWMA: 0 = DPWMA(n) pass through (default) 1 = Edge-gen output, DPWMA(n) 2 = DPWNC(n) 3 = DPWMB(n) (Crossover) 4 = DPWMA(n+1) 5 = DPWMB(n+1) 6 = DPWMC(n+1) 7 = DPWMC(n+2) 8 = DPWMC(n+3) and for DPWMB: 0 = DPWMB(n) pass through (default) 1 = Edge-gen output, DPWMB(n) 2 = DPWNC(n) 3 = DPWMA(n) (Crossover) 4 = DPWMA(n+1) 5 = DPWMB(n+1) 30 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: UCD3138128 UCD3138A64 |
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