| 전자부품 데이터시트 검색엔진 |
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AR0130CSSC00SPBA0-DP 데이터시트(PDF) 48 Page - ON Semiconductor |
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AR0130CSSC00SPBA0-DP 데이터시트(HTML) 48 Page - ON Semiconductor |
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48 / 53 page ![]() AR0130 DS Rev. L Pub. 6/15 EN 48 ©Semiconductor Components Industries, LLC, 2015. AR0130: 1/3-Inch CMOS Digital Image Sensor Power-On Reset and Standby Timing Power-On Reset and Standby Timing Power-Up Sequence The recommended power-up sequence for the AR0130 is shown in Figure 33. The avail- able power supplies (VDD_IO, VDD, VDD_SLVS, VDD_PLL, VAA, VAA_PIX) must have the separation specified below. 1. Turn on VDD_PLL power supply. 2. After 0–10s, turn on VAA and VAA_PIX power supply. 3. After 0–10s, turn on VDD power supply. 4. After 0–10s, turn on VDD_IO power supply. 5. After the last power supply is stable, enable EXTCLK. 6. Assert RESET_BAR for at least 1ms. 7. Wait 150000 EXTCLKs (for internal initialization into software standby. 8. Configure PLL, output, and image settings to desired values. 9. Wait 1ms for the PLL to lock. 10. Set streaming mode (R0x301a[2] = 1). Figure 33: Power Up VDD_PLL (2.8) VAA_PIX VAA (2.8) VDD_IO (1.8/2.8) VDD (1.8) VDD_SLVS EXTCLK RESET_BAR t0 t1 t2 t3 tx t4 t5 t6 Hard Reset Internal Initialization Software Standby PLL Lock Streaming |
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