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SM1350 데이터시트(PDF) 12 Page - Nippon Precision Circuits Inc |
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SM1350 데이터시트(HTML) 12 Page - Nippon Precision Circuits Inc |
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12 / 21 page ![]() SM1350 series NIPPON PRECISION CIRCUITS—12 Level hold melody output (LH = HIGH) S0, S1 melody output control The melody selection in serial mode is controlled by S0 and S1 as shown in the following table. When S1 is HIGH, S0 switches to a pull-up input configuration. The states of S0 and S1 are read in immediately after start- up and does not change during melody output. Note: Refer to the "TIMING DIAGRAMS" section to confirm melody timing specifics Figure 10. Level hold mode (serial select) STN #N #N+1 #N+1 Melody Output Table 1. S0, S1 resistor and melody counter S 0 S 1 Melod y counter LOW × Increments when melody output stops HIGH LOW No increment HIGH HIGH Increments when melody output starts Note: Refer to the "TIMING DIAGRAMS" section to confirm melody timing specifics Figure 11. S0, S1 melody output control timing STN S1 S0 #N #N+1 #N+2 #N+2 Serection Counter Melody Output #N #N+1 #N+2 #N+2 |
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