Z86C9620VSC datasheet(23/46 Pages) ZILOG

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Z86C61/62/96

Z8® MICROCONTROLLER

Stack. The Z86C61/62/96 has a 16-bit Stack Pointer (R255-

R254) used for external stack that resides anywhere in the

data memory for the ROMless mode, but only from 16384

to 65535 in the ROM mode. An 8-bit Stack Pointer (R255)

is used for the internal stack that resides within the 236

general-purpose registers (R239-R4). The high byte of the

Stack Pointer (SPH-Bit 8-15) can be used as a general

purpose register when using internal stack only.

Counter/Timers. There are two 8-bit programmable

counter/timers (T0-T1), each driven by its own 6-bit pro-

grammable prescaler. The T1 prescaler can be driven by

internal or external clock sources; however, the T0 prescaler

is driven by the internal clock only (Figure 22).

The 6-bit prescalers can divide the input frequency of the

clock source by any integer number from 1 to 64. Each

prescaler drives its counter, which decrements the value

(1 to 256) that has been loaded into the counter. When both

the counters and prescaler reach the end of the count, a

timer interrupt request, IRQ4 (T0) or IRQ5 (T1), is gener-

ated.

The counter can be programmed to start, stop, restart to

continue, or restart from the initial value. The counters can

also be programmed to stop upon reaching zero (single

pass mode) or to automatically reload the initial value and

continue counting (modulo-n continuous mode).

The counter, but not the prescalers, can be read at any

time without disturbing their value or count mode. The

clock source for T1 is user-definable and can be either the

internal microprocessor clock divided-by-four, or an exter-

nal signal input through Port 3. The Timer Mode register

configures the external timer input (P31) as an external

clock, a trigger input that can be retriggerable or non-

retriggerable, or as a gate input for the internal clock. Port

3, line P36, also serves as a timer output (T

OUT) through

which T0, T1 or the internal clock can be output. The

counter/timers can be cascaded by connecting the T0

output to the input of T1.

ROM Protect. The first 16 Kbytes of program memory is

mask programmable. A ROM protect feature prevents

“dumping” of the ROM contents by inhibiting execution of

LDC, LDCI, LDE, and LDEI instructions by external pro-

gram memory when pointing to internal memory locations.

Therefore these instructions can be used only when they

are executed from internal memory, or if they are executed

from external memory and pointing to external memory

locations.

The ROM Protect option is mask-programmable, to be

selected by the customer at the time when the ROM code

is submitted.

The upper nibble of the register file address

provided by the register pointer specifies

the active working-register group.

R253

(Register Pointer)

I/O Ports

Specified Working

The lower nibble

of the register

file address

provided by the

instruction points

to the specified

R15 to R0

R15 to R4*

R3 to R0*

* Expanded Register Group (0) is selected

in this figure by handling bits D3 to D0

as "0" in Register R253 (RP).

Figure 21. Register Pointer

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