L8708H datasheet(24/66 Pages) ZILOG

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Z86L88/81/86/87/89/73

IR/Low-Voltage Microcontroller

P R E L I M I N A R Y

DS96LV00800

PIN FUNCTIONS (Continued)

After the POR time, /RESET is a Schmitt-triggered input.

To avoid asynchronous and noisy reset problems, the

Z86LXX is equipped with a reset filter of four external

clocks (4TpC). If the external reset signal is less than 4TpC

in duration, no reset occurs. On the fifth clock after the re-

set is detected, an internal RST signal is latched and held

for an internal register count of 18 external clocks, or for

the duration of the external reset, whichever is longer.

During the reset cycle, /DS is held active Low while /AS cy-

cles at a rate of TpC/2. Program execution begins at loca-

tion 000CH, 5-10 TpC cycles after the RST is released. For

Power-On Reset, the typical reset output time is 5 ms. The

Z86LXX does not reset WDTMR, SMR, P2M, or P3M reg-

isters on a Stop-Mode Recovery operation. The output

states of Port3 and Port2 are also un-affected by a Stop-

Mode recovery.

Figure 17. Port 3 Conﬁguration

Port 3

(I/O or Handshake)

Z86L7X

MCU

Pref1

P31

P32

P33

P34

P35

P36

P37

Note:

P31, 32, 33 have a 200 K

Ω

mask option

200 K

Ω

Mask

Option

R247 = P3M

P31 (AN1)

P32 (AN2)

P33 (REF2)

From Stop-Mode

Recovery Source of SMR

1 = Analog

0 = Digital

IRQ2, P31 Data Latch

IRQ0, P32 Data Latch

IRQ1, P33 Data Latch

DIG.

AN.

Pref

Comp1

Comp2

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