AS3435 datasheet(67/102 Pages) AMSCO

67 / 102 page

ams Datasheet, Confidential: 2014-Jun-13 [v1-30]

AS3415/AS3435 – 67

Reg i st er Description

System Registers

Figure 85:

SYSTEM Register Description

Name

Address

Default Value

SYSTEM

0x20

81h

This register contains control bits for monitor mode, OTP register and power up/down functions.

Bit

Bit Name

Default

Access

Bit Description

7:4

DESIGN_VERSION

1110

Design version number to identify the design version

of the AS3415/35.

1010: For chip version 1v0

1011: For chip version 1v1

1100: For chip version 1v2

1101: for chip version 1v3

1110: for chip version 1v5

3EVAL_REG_ON

R/W

This register controls read and write access to the OTP

0: Normal operation

1: Enables writing to register 0x3D, 0x3E and 0x3F to

configure the OTP and set the access mode.

0PWR_HOLD

R/W

This bit allows an MCU using the I²C interface a power

down of the AS3415/35. A start condition on the I²C

interface will wake up the device again. This function

works only if the I2C_MODE bit is set before you write

this register.

0: Power up hold is cleared and chip powers down

1: It is automatically set to on after power on

AS3435 데이터시트(PDF) 67 Page - ams AG

AS3435 데이터시트(HTML) 67 Page - ams AG

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL