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AS5047P 데이터시트(PDF) 11 Page - ams AG |
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AS5047P 데이터시트(HTML) 11 Page - ams AG |
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11 / 40 page ![]() ams Datasheet Page 11 [v1-00] 2014-Oct-31 Document Feedback AS5047P − Detailed Description SPI Interface (slave) The SPI interface is used by a host microcontroller (master) to read or write the volatile memory as well as to program the non-volatile OTP registers. The AS5047P SPI only supports slave operation mode. It communicates at clock rates up to 10 MHz. The AS5047P SPI uses mode=1 (CPOL=0, CPHA=1) to exchange data. As shown in Figure 11, a data transfer starts with the falling edge of CSn (SCL is low). The AS5047P samples MOSI data on the falling edge of SCL. SPI commands are executed at the end of the frame (rising edge of CSn). The bit order is MSB first. Data is protected by parity. SPI Timing The AS5047P SPI timing is shown in Figure 11. Figure 11: SPI Timing Diagram CSn (Input) CLK (Input) MOSI (Input) MISO (Output) tclk tL tMOSI tMISO tOZ tOZ tH tCSn tclkL tclkH Data[15] Data[15] Data[14] Data[14] Data[0] Data[0] |
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