BQ76PL536APAPR datasheet(64/74 Pages) TI1

64 / 74 page

bq76PL536A

SLUSAD3B – JUNE 2011 – REVISED JANUARY 2016

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Layout Guidelines (continued)

–

First, in a stacked system, individual ground planes are necessary for proper noise rejection and stability

of the circuits.

–

Second, the ground (VSS) reference per circuit block is unique. The most negative connection, per block

“CELL0”, is the ground (VSS) reference for each IC. Do not connect ground references from different ICs.

Only the ground reference CELL0, of the most southerly IC, is safe to connect non-isolated test equipment

grounds.

CAUTION

Be careful as the BAT and VSS pins may be several hundred volts above system

ground, depending on their position in the stack.

NOTE

North (_N) pins of the top, most-positive device in the stack, should be connected to the

BAT1(2) pins of the device for correct operation of the string. South (_S) pins of the

lowest, most-negative device in the stack, should be connected to VSS of the device.

The PowerPAD™ package is a thermally enhanced standard-size IC package designed to eliminate the use of

bulky heat sinks and slugs traditionally used in thermal packages. This package can be easily mounted using

standard printed circuit board (PCB) assembly techniques, and can be removed and replaced using standard

repair procedures. See Figure 67.

The PowerPAD™ package is designed so that the lead frame die pad (or thermal pad) is exposed on the bottom

of the IC. This provides an extremely low-thermal resistance (RθJC) path between the die and the exterior of the

package. The thermal pad on the bottom of the IC can then be soldered directly to the printed circuit board

(PCB), using the PCB as a heat sink. In addition, through the use of thermal bias, the thermal pad can be directly

connected to a ground plane or special heat sink structure designed into the PCB.

Figure 67. Section View of PowerPAD™ Package and Top View of Solder Mask and PAD

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