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TMS320C6743CPTP2 데이터시트(PDF) 21 Page - Texas Instruments

부품명 TMS320C6743CPTP2
상세설명  Fixed- and Floating-Point Digital Signal Processor
PDF  151 Pages
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI1 - Texas Instruments

TMS320C6743CPTP2 데이터시트(HTML) 21 Page - Texas Instruments

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T
AXR1[0]/
GP4[0]
NC
SPI0_CLK/
EQEP1I/
GP5[2]/
BOOT[2]
EQEP1S/
GP5[7]/
BOOT[7]
1
2
3
4
5
6
EMA_CS[3]/
GP2[6]
7
NC
8
9
EMA_A[4]/
GP1[4]
10
EMA_A[8]/
GP1[8]
11
NC
12
EMA_D[0]/
MMCSD_DAT[0]/
GP0[0]/
BOOT[12]
13
14
15
16
DVDD
R
AXR1[1]/
GP4[1]
UART0_RXD/
I2C0_SDA
TM64P0_IN12/
GP5[8]/BOOT[8]
UART2_RXD/
GP5[12]
SPI0_ENA/
UART0_CTS/
EQEP0A/
GP5[3]/
BOOT[3]
/
SPI0_SOMI[0]/
EQEP0I/
GP5[0]/
BOOT[0]
EMA_OE/
AXR0[13]/
GP2[7]
EMA_BA[0]/
GP1[14]
EMA_A[1]/
MMCSD_CLK/
GP1[1]
EMA_A[5]/
GP1[5]
EMA_A[9]/
GP1[9]
EMA_D[2]/
MMCSD_DAT[2]/
GP0[2]
EMA_D[1]/
MMCSD_DAT[1]/
GP0[1]
DVDD
P
AXR1[3]/
EQEP1A/
GP4[3]
AXR1[2]/
GP4[2]
UART0_TXD/
I2C0_SCL/
TM64P0_OUT12/
GP5[9]/BOOT[9]
UART2_TXD/
GP5[13]
I2C1_SCL/
GP5[5]/
BOOT[5]
SPI0_SIMO[0]/
EQEP0S/
GP5[1]/
BOOT[1]
EMA_CS[2]/
GP2[5]/
BOOT[15]
/
EMA_BA[1]/
GP1[13]
EMA_A[2]/
MMCSD_CMD/
GP1[2]
EMA_A[6]/
GP1[6]
EMA_A[11]/
GP1[11]
EMA_D[4]/
MMCSD_DAT[4]/
GP0[4]
EMA_D[3]/
MMCSD_DAT[3]/
GP0[3]
N
AXR1[5]/
EPWM2B/
GP4[5]
AXR1[4]/
EQEP1B/
GP4[4]
SPI0_SCS[0]/
UART0_RTS/
EQEP0B/
GP5[4]/
BOOT[4]
I2C1_SDA/
GP5[6]/
BOOT[6]
EMA_WAIT[0]/
GP2[10]
EMA_A[10]/
GP1[10]
EMA_A[3]/
GP1[3]
EMA_A[7]/
GP1[7]
EMA_A[12]/
GP1[12]
EMA_D[6]/
MMCSD_DAT[6]/
GP0[6]
EMA_D[5]/
MMCSD_DAT[5]/
GP0[5]
M
AXR1[8]/
EPWM1A/
GP4[8]
AXR1[7]/
EPWM1B/
GP4[7]
AXR1[6]/
EPWM2A/
GP4[6]
DVDD
DVDD
DVDD
DVDD
EMA_WE/
AXR0[12]/
GP2[3]/
BOOT[14]
EMA_D[7]/
MMCSD_DAT[7]/
GP0[7]/
BOOT[13]
L
AHCLKR1/
GP4[11]
ACLKR1/
ECAP2/
APWM2/
GP4[12]
AFSR1/
GP4[13]
DVDD
CVDD
DVDD
DVDD
EMB_CAS
K
GP7[14]
AHCLKX1/
EPWM0B/
GP3[14]
ACLKX1/
EPWM0A/
GP3[15]
AFSX1/
EPWMSYNCI/
EPWMSYNCO/
GP4[10]
DVDD
CVDD
CVDD
CVDD
DVDD
EMB_WE_
DQM[0]/
GP5[15]
EMB_WE
CVDD
TMS
J
TDI
TDO
TRST
CVDD
CVDD
CVDD
CVDD
CVDD
EMB_D[5]/
GP6[5]
EMB_D[6]/
GP6[6]
EMB_D[7]/
GP6[7]
H
TCK
CVDD
CVDD
CVDD
EMB_D[3]/
GP6[3]
EMB_D[4]/
GP6[4]
CVDD
G
RESET
DVDD
CVDD
VSS
CVDD
CVDD
DVDD
CVDD
EMB_D[1]/
GP6[1]
EMB_D[2]/
GP6[2]
OSCOUT
F
OSCIN
DVDD
CVDD
RSV1
DVDD
DVDD
EMB_D[15]/
GP6[15]
EMB_D[0]/
GP6[0]
PLL0_VSSA
E
OSCVSS
DVDD
DVDD
DVDD
DVDD
EMB_D[13]/
GP6[13]
EMB_D[14]/
GP6[14]
PLL0_VDDA
D
AMUTE1/
EPWMTZ/
GP4[14]
AFSX0/
GP2[13]/
BOOT[10]
AXR0[10]/
GP3[10]
AXR0[6]/
RMII_RXER/
GP3[6]
AXR0[2]/
RMII_TXEN/
GP3[2]
EMB_CS[0]
EMB_A[0]/
GP7[2]
EMB_A[4]/
GP7[6]
EMB_A[8]/
GP7[10]
EMB_D[9]/
GP6[9]
EMB_D[10]/
GP6[10]
EMB_D[11]/
GP6[11]
EMB_D[12]/
GP6[12]
C
AFSR0/
GP3[12]
ACLKX0/
ECAP0/
APWM0/
GP2[12]
AXR0[9]/
GP3[9]
AXR0[5]/
RMII_RXD[1]/
GP3[5]
AXR0[1]/
RMII_TXD[1]/
GP3[1]
EMB_BA[0]/
GP7[1]
EMB_A[1]/
GP7[3]
EMB_A[5]/
GP7[7]
EMB_A[9]/
GP7[11]
EMB_SDCKE
EMB_CLK
EMB_WE_
DQM[1]/
GP5[14]
EMB_D[8]/
GP6[8]
B
RSV2
VSS
ACLKR0/
ECAP1/
APWM1/
GP2[15]
AHCLKX0/
AHCLKX2/
GP2[11]
AXR0[8]/
MDIO_D/
GP3[8]
AXR0[4]/
RMII_RXD[0]/
GP3[4]
AXR0[0]/
RMII_TXD[0]/
GP3[0]
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
EMB_BA[1]/
GP7[0]
EMB_A[2]/
GP7[4]
EMB_A[6]/
GP7[8]
EMB_A[11]/
GP7[13]
EMB_A[12]/
GP3[13]
DVDD
A
SS
V
AHCLKR0/
RMII_MHZ_
50_CLK/
GP2[14]/
BOOT[11]
AXR0[11]/
GP3[11]
AXR0[7]/
MDIO_CLK/
GP3[7]
AXR0[3]/
RMII_CRS_DV/
GP3[3]
EMB_RAS
EMB_A[10]/
GP7[12]
EMB_A[3]/
GP7[5]
EMB_A[7]/
GP7[9]
T
R
P
N
M
L
K
J
H
G
F
E
D
C
B
A
RVDD
RVDD
NC
NC
GP0[8]
GP0[9]
GP0[10]
GP0[12]
GP0[14]
NC
NC
NC
GP0[11]
GP0[13]
GP0[15]
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
RSV4
NC
NC
NC
NC
NC
NC
EMU0/
GP7[15]
EMA_A[0]/
GP1[0]
Note:
NC = No Connect
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
VSS
NC
NC
TMS320C6743
www.ti.com
SPRS565D – APRIL 2009 – REVISED JUNE 2014
3.5
Pin Assignments
Extensive use of pin multiplexing is used to accommodate the largest number of peripheral functions in
the smallest possible package. Pin multiplexing is controlled using a combination of hardware
configuration at device reset and software programmable register settings.
3.5.1
Pin Map (Bottom View)
Figure 3-3 and Figure 3-4 show the pin assignments for ZKB package and PTP packages, respectively.
Figure 3-3. Pin Map (ZKB)
Copyright © 2009–2014, Texas Instruments Incorporated
Device Overview
21
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