TMS320C6743CPTP2 datasheet(5/151 Pages) TI1

5 / 151 page

TMS320C6743

www.ti.com

SPRS565D – APRIL 2009 – REVISED JUNE 2014

Table of Contents

TMS320C6743 Fixed- and Floating-Point Digital

6.8

General-Purpose Input/Output (GPIO)

.............. 56

Signal Processor

......................................... 1

6.9

EDMA

............................................... 59

1.1

Features

.............................................. 1

6.10

External Memory Interface A (EMIFA)

.............. 64

1.2

Applications

........................................... 2

6.11

External Memory Interface B (EMIFB)

.............. 70

1.3

Description

............................................ 3

6.12

Memory Protection Units

............................ 76

1.4

Functional Block Diagram

............................ 4

6.13

MMC / SD / SDIO (MMCSD)

........................ 79

Revision History

......................................... 6

6.14

Ethernet Media Access Controller (EMAC)

......... 82

Device Overview

......................................... 7

6.15

Management Data Input/Output (MDIO)

............ 87

3.1

Device Characteristics

................................ 7

6.16

Multichannel Audio Serial Ports (McASP0,

McASP1)

............................................ 89

3.2

Device Compatibility

.................................. 8

6.17

Serial Peripheral Interface Ports (SPI0)

............. 99

3.3

DSP Subsystem

...................................... 8

6.18

Enhanced Capture (eCAP) Peripheral

............. 112

3.4

Memory Map Summary

............................. 18

6.19

Enhanced Quadrature Encoder (eQEP)

3.5

Pin Assignments

.................................... 21

Peripheral

.......................................... 115

3.6

Terminal Functions

.................................. 23

6.20

Enhanced Pulse Width Modulator (eHRPWM)

Device Configuration

.................................. 36

Modules

............................................ 117

4.1

Boot Modes

......................................... 36

6.21

Timers

.............................................. 121

4.2

SYSCFG Module

.................................... 36

6.22

Inter-Integrated Circuit Serial Ports (I2C0, I2C1)

.. 123

4.3

Pullup/Pulldown Resistors

.......................... 38

6.23

Universal Asynchronous Receiver/Transmitter

Device Operating Conditions

........................ 39

(UART)

............................................. 127

5.1

Absolute Maximum Ratings Over Operating

6.24

Power and Sleep Controller (PSC)

................ 129

Junction Temperature Range

6.25

Programmable Real-Time Unit Subsystem

(Unless Otherwise Noted)

................................. 39

(PRUSS)

........................................... 132

5.2

Handling Ratings

.................................... 39

6.26

Emulation Logic

.................................... 135

5.3

Recommended Operating Conditions

............... 40

6.27

IEEE 1149.1 JTAG

................................ 137

5.4

Notes on Recommended Power-On Hours (POH)

. 41

Device and Documentation Support

.............. 139

5.5

Electrical Characteristics Over Recommended

7.1

Device Support

..................................... 139

Ranges of Supply Voltage and Operating Junction

7.2

Documentation Support

............................ 140

Temperature (Unless Otherwise Noted)

............ 42

7.3

Community Resources

............................. 141

Peripheral Information and Electrical

Specifications

........................................... 43

7.4

Trademarks

........................................ 141

6.1

Parameter Information

.............................. 43

7.5

Electrostatic Discharge Caution

................... 141

6.2

Recommended Clock and Control Signal Transition

7.6

Glossary

............................................ 141

Behavior

............................................. 44

Mechanical Packaging and Orderable

6.3

Power Supplies

...................................... 44

Information

............................................. 142

6.4

Reset

................................................ 45

8.1

Thermal Data for ZKB

............................. 142

6.5

Crystal Oscillator or External Clock Input

........... 47

8.2

Thermal Data for PTP

............................. 143

6.6

Clock PLLs

.......................................... 48

8.3

Supplementary Information About the 176-pin PTP

PowerPAD™ Package

............................. 143

6.7

DSP Interrupts

...................................... 52

8.4

Mechanical Drawings

.............................. 144

Table of Contents

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