COP888GD datasheet(11/42 Pages) NSC

11 / 42 page

Pin Descriptions

CC and GND are the power supply pins. All VCC and GND

pins must be connected.

CKI is the clock input. This can come from an R/C generated

oscillator, or a crystal oscillator (in conjunction with CKO).

See Oscillator Description section.

RESET is the master reset input. See Reset Description sec-

tion.

The device contains three bidirectional 8-bit I/O ports (C, G

and L), where each individual bit may be independently con-

figured as an input (Schmitt Trigger inputs on ports L and G),

output or TRI-STATE under program control. Three data

memory address locations are allocated for each of these

I/O ports. Each I/O port has two associated 8-bit memory

mapped registers, the CONFIGURATION register and the

output DATA register. A memory mapped address is also re-

served for the input pins of each I/O port. (See the memory

map for the various addresses associated with the I/O ports.)

Figure 4 shows the I/O port configurations. The DATA and

CONFIGURATION registers allow for each port bit to be in-

dividually configured under software control as shown below:

CONFIGURATION

DATA

Port Set-Up

Hi-Z Input

(TRI-STATE Output)

Input with Weak Pull-Up

Push-Pull Zero Output

Push-Pull One Output

PORT L is an 8-bit I/O port. All L-pins have Schmitt triggers

on the inputs.

Port L supports Multi-Input Wake Up on all eight pins. L4 and

L5 are used for the timer input functions T2A and T2B. L6

and L7 are used for the timer input functions T3A and T3B.

Port L has the following alternate features:

MIWU or T3B

MIWU or T3A

MIWU or T2B

MIWU or T2A

MIWU

Port G is an 8-bit port with 5 I/O pins (G0, G2–G5), an input

pin (G6), and a dedicated output pin (G7). Pins G0 and

G2–G6 all have Schmitt Triggers on their inputs. Pin G1

serves as the dedicated WDOUT WATCHDOG output, while

pin G7 is either input or output depending on the oscillator

mask option selected. With the crystal oscillator option se-

lected, G7 serves as the dedicated output pin for the CKO

clock output. With the single-pin R/C oscillator mask option

selected, G7 serves as a general purpose input pin but is

also used to bring the device out of HALT mode with a low to

high transition on G7. There are two registers associated

with the G Port, a data register and a configuration register.

Therefore, each of the 5 I/O bits (G0, G2–G5) can be indi-

vidually configured under software control.

Since G6 is an input only pin and G7 is the dedicated CKO

clock output pin (crystal clock option) or general purpose in-

put (R/C clock option), the associated bits in the data and

configuration registers for G6 and G7 are used for special

purpose functions as outlined on the next page. Reading the

G6 and G7 data bits will return zeros.

Note that the chip will be placed in the HALT mode by writing

a “1” to bit 7 of the Port G Data Register. Similarly the chip

will be placed in the IDLE mode by writing a “1” to bit 6 of the

Port G Data Register.

Writing a “1” to bit 6 of the Port G Configuration Register en-

ables the MICROWIRE/PLUS to operate with the alternate

phase of the SK clock. The G7 configuration bit, if set high,

enables the clock start up delay after HALT when the R/C

clock configuration is used.

Config Reg.

Data Reg.

CLKDLY

HALT

Alternate SK

IDLE

Port G has the following alternate features:

G6 SI (MICROWIRE Serial Data Input)

G5 SK (MICROWIRE Serial Clock)

G4 SO (MICROWIRE Serial Data Output)

G3 T1A (Timer T1 I/O)

G2 T1B (Timer T1 Capture Input)

G0 INTR (External Interrupt Input)

Port G has the following dedicated functions:

G7 CKO Oscillator dedicated output or general purpose

input

G1 WDOUT WATCHDOG and/or Clock Monitor dedi-

cated output

Port C is an 8-bit I/O port. The 40-pin device does not have

a full complement of Port C pins. The unavailable pins are

not terminated. A read operation for these unterminated pins

will return unpredicatable values.

Port I is an 8-bit Hi-Z input port, and also provides the analog

inputs to the A/D converter. The 28-pin device does not have

a full complement of Port I pins. The unavailable pins are not

terminated (i.e. they are floating). A read operation from

these unterminated pins will return unpredictable values.

The user should ensure that the software takes this into ac-

count by either masking out these inputs, or else restricting

the accesses to bit operations only. If unterminated, Port I

pins will draw power only when addressed.

DS100076-5

FIGURE 4. I/O Port Configurations

COP888GD 데이터시트(PDF) 11 Page - National Semiconductor (TI)

COP888GD 데이터시트(HTML) 11 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42

데이터시트 다운로드

링크 URL