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CS5530 데이터시트(PDF) 117 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
부품명 CS5530
상세설명  Geode??CS5530 I/O Companion Multi-Function South Bridge
PDF  241 Pages
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제조업체  NSC [National Semiconductor (TI)]
홈페이지  http://www.national.com
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CS5530 데이터시트(HTML) 117 Page - National Semiconductor (TI)

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Functional Description (Continued)
3.7.1.4
Programming Model
The following discussion explains, in steps, how to initiate
and maintain a bus master transfer between memory and
an audio slave device.
In the steps listed below, the reference to “Example”
refers to Figure 3-20, PRD Table Example.
1)
Software creates a PRD table in system memory.
Each PRD entry is 8 bytes long; consisting of a base
address pointer and buffer size. The maximum data
that can be transferred from a PRD entry is 64 KB. A
PRD table must be aligned on a 4-byte boundary.
Thelast PRD inaPRD tablemust havethe EOTor
JMP bit set.
Example - Assume the data is outbound. There are
three PRDs in the example PRD table. The first two
PRDs (PRD_1, PRD_2) have only the EOP bit set.
The last PRD (PRD_3) has only the JMP bit set. This
example creates a PRD loop.
2)
Software loads the starting address of the PRD table
by programming the PRD Table Address Register.
Example - Program the PRD Table Address Register
with Address_3.
3)
Software must fill the buffers pointed to by the PRDs
with audio data. It is not absolutely necessary to fill
the buffers; however, the buffer filling process must
stay ahead of the buffer emptying. The simplest way
to do this is by using the EOP flags to generate an
SMI when a PRD is empty.
Example - Fill Audio Buffer_1 and Audio Buffer_2.
The SMI generated by the EOP from the first PRD
allows the software to refill Audio Buffer_1. The
second SMI will refill Audio Buffer_2. The third SMI
will refill Audio Buffer_1 and so on.
4)
Read the SMI Status Register to clear the Bus
Master Error and End of Page bits (bits 1 and 0).
Set the correct direction to the Read or Write Control
bit (Command Register bit 3). Note that the direction
of the data transfer of a particular bus master is fixed
and therefore the direction bit must be programmed
accordingly. It is assumed that the codec has been
properly programmed to receive the audio data.
Engage the bus master by writing a “1” to the Bus
Master Control bit (Command Register bit 0).
The bus master reads the PRD entry pointed to by
the PRD Table Address Register and increments the
address by 08h to point to the next PRD. The transfer
begins.
Example -
The
bus
master
is
now
properly
programmed to transfer Audio Buffer_1 to a specific
slot(s) in the AC97 interface.
Figure 3-20. PRD Table Example
Address_1
Size_1
EOT = 0
Audio
Buffer_1
Audio
Buffer_2
Size_1
Size_2
Address_1
EOP = 1
JMP = 0
Address_2
Size_2
EOT = 0
EOP = 1
JMP = 0
Address_3
Don’t Care
EOT = 0
EOP = 0
JMP = 1
PRD_1
PRD_2
PRD_3
Address_2
Address_3



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