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TDA8029HL/C2 데이터시트(PDF) 38 Page - NXP Semiconductors

부품명 TDA8029HL/C2
상세설명  Low power single card reader
PDF  58 Pages
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제조업체  PHILIPS [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

TDA8029HL/C2 데이터시트(HTML) 38 Page - NXP Semiconductors

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2003 Oct 30
38
Philips Semiconductors
Product specification
Low power single card reader
TDA8029
Table 58 Baud rate selection using values F and D; card clock frequency fCLK = 3.58 MHz for PSC = 31 and
fCLK = 4.92 MHz for PSC = 32 (example: in this table 31;12 means prescaler set to 31 and PDR set to 12)
8.10.3.3
Guard Time Register (GTR)
The guard time register is used for storing the number of guard ETUs given by the card during ATR. In transmission
mode, the UART will wait this number of ETUs before transmitting the character stored in register UTR.
Table 59 Guard time register, address 5h, read and write
Table 60 Description of register bits
D
F
01234569
10
11
12
13
1
31;12
9600
31;12
9600
31;18
6400
31;24
4800
31;36
3200
31;48
2400
31;60
1920
32;16
9600
32;24
6400
32;32
4800
32;48
3200
32;64
2400
2
31;6
19200
31;6
19200
31;9
12800
31;12
9600
31;18
6400
31;24
4800
31;30
3840
32;8
19200
32;12
12800
32;16
9600
32;24
6400
32;32
4800
3
31;3
38400
31;3
38400
−
31;6
19200
31;9
12800
31;12
9600
31;15
7680
32;4
38400
32;6
25600
32;8
19200
32;12
12800
32;16
9600
4
−−−
31;3
38400
−
31;6
19200
−
32;2
76800
32;3
51300
32;4
38400
32;6
25600
32;8
19200
5
−−−−−
31;3
38400
−
32;1
153600
−
32;2
76800
32;3
51300
32;4
38400
6
−−−−−−−−−
32;1
153600
−
32;2
76800
8
31;1
115200
31;1
115200
−
31;2
57600
31;3
38400
31;4
28800
31;5
23040
−
32;2
76800
−
32;4
38400
−
9
−−−−−−
31;3
38400
−−−−−
BIT
7
6
543210
Symbol
GT7
GT6
GT5
GT4
GT3
GT2
GT1
GT0
Reset value
0
0
0
00000
BIT
SYMBOL
DESCRIPTION
7 to 0
GT[7:0]
Guard time value. When GT[7:0] = FFh:
• In protocol T = 1
– TDA8029HL/C1 operates at 11 ETU
– TDA8029HL/C2 operates at 10.8 ETU.
• In protocol T = 0.
– TDA8029HL/C1 operates at 12 ETU
– TDA8029HL/C2 operates at 11.8 ETU.



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