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COP8CCR9IMT7/NOPB 데이터시트(PDF) 64 Page - Texas Instruments

부품명 COP8CCR9IMT7/NOPB
상세설명  8-Bit CMOS Flash Microcontroller with 32k Memory
PDF  111 Pages
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제조업체  TI1 [Texas Instruments]
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COP8CCR9IMT7/NOPB 데이터시트(HTML) 64 Page - Texas Instruments

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COP8CBR9, COP8CCR9, COP8CDR9
SNOS535I – OCTOBER 2000 – REVISED MARCH 2013
www.ti.com
Figure 5-17. Framing Formats
5.13.6 USART INTERRUPTS
The USART is capable of generating interrupts. Interrupts are generated on Receive Buffer Full and
Transmit Buffer Empty. Both interrupts have individual interrupt vectors. Two bytes of program memory
space are reserved for each interrupt vector. The two vectors are located at addresses 0xEC to 0xEF Hex
in the program memory space. The interrupts can be individually enabled or disabled using Enable
Transmit Interrupt (ETI) and Enable Receive Interrupt (ERI) bits in the ENUI register.
The interrupt from the Transmitter is set pending, and remains pending, as long as both the TBMT and
ETI bits are set. To remove this interrupt, software must either clear the ETI bit or write to the TBUF
register (thus clearing the TBMT bit).
The interrupt from the receiver is set pending, and remains pending, as long as both the RBFL and ERI
bits are set. To remove this interrupt, software must either clear the ERI bit or read from the RBUF register
(thus clearing the RBFL bit).
64
Functional Description
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