DP83848JSQSLASHNOPB datasheet(68/84 Pages) TI1

68 / 84 page

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DP83848H, DP83848J, DP83848K, DP83848M, DP83848T

SNLS250E – MAY 2008 – REVISED APRIL 2015

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7.2.2.1.2 Recommended Maximum Trace Length

Although RMII and MII are synchronous bus architectures, there are a number of factors limiting signal

trace lengths. With a longer trace, the signal becomes more attenuated at the destination and thus more

susceptible to noise interference. Longer traces also act as antennas, and if run on the surface layer, can

increase EMI radiation. If a long trace is running near and adjacent to a noisy signal, the unwanted signals

could be coupled in as cross talk. It is recommended to keep the signal trace lengths as short as possible.

Ideally, keep the traces under 6 inches. Trace length matching, to within 2 inches on the MII or RMII bus

is also recommended. Significant differences in the trace lengths can cause data timing issues. As with

any high speed data signal, good design practices dictate that impedance should be maintained and stubs

should be avoided throughout the entire data path.

7.2.2.2

Calculating Impedance

The following equations can be used to calculate the differential impedance of the board. For microstrip

traces, a solid ground plane is needed under the signal traces. The ground plane helps keep the EMI

localized and the trace impedance continuous. Because stripline traces are typically sandwiched between

the ground/supply planes, they have the advantage of lower EMI radiation and less noise coupling. The

trade off of using strip line is lower propagation speed.

7.2.2.2.1 Microstrip Impedance – Single-Ended

(3)

Figure 7-5. Microstrip Impedance – Single-Ended

Application, Implementation, and Layout

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DP83848JSQ/NOPB 데이터시트(PDF) 68 Page - Texas Instruments