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DP83848JSQ/NOPB 데이터시트(PDF) 9 Page - Texas Instruments |
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DP83848JSQ/NOPB 데이터시트(HTML) 9 Page - Texas Instruments |
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9 / 84 page ![]() DP83848H, DP83848J, DP83848K, DP83848M, DP83848T www.ti.com SNLS250E – MAY 2008 – REVISED APRIL 2015 4.9 10 Mb/s and 100 Mb/s PMD Interface SIGNAL TYPE PIN # DESCRIPTION NAME Differential common driver transmit output (PMD Output Pair). These differential outputs are automatically configured to either 10BASE-T or 100BASE-TX signaling. TD-, TD+ I/O 14, 15 In Auto-MDIX mode of operation, this pair can be used as the Receive Input pair. These pins require 3.3-V bias for operation. Differential receive input (PMD Input Pair). These differential inputs are automatically configured to accept either 100BASE-TX or 10BASE-T signaling. RD-, RD+ I/O 11, 12 In Auto-MDIX mode of operation, this pair can be used as the Transmit Output pair. These pins require 3.3-V bias for operation. 4.10 Special Connections SIGNAL TYPE PIN # DESCRIPTION NAME RBIAS I 20 Bias Resistor Connection. A 4.87-k Ω 1% resistor should be connected from RBIAS to GND. Power Feedback Output. Parallel caps, 10 µF (Tantalum preferred) and 0.1 µF, should be placed PFBOUT O 19 close to the PFBOUT. Connect this pin to PFBIN1 (pin 16) and PFBIN2 (pin 30). See Section 7.2.1.3 for proper placement pin. Power Feedback Input. These pins are fed with power from PFBOUT pin. A small capacitor of 0.1 PFBIN1 16 µF should be connected close to each pin. I PFBIN2 30 Note: Do not supply power to these pins other than from PFBOUT. RESERVED I/O 8,9,10 RESERVED: These pins must be left unconnected. 4.11 Power Supply Pins SIGNAL NAME PIN # DESCRIPTION IOVDD33 1, 26 I/O 3.3-V Supply IOGND 40 I/O Ground DGND 29 Digital Ground AVDD33 18 Analog 3.3-V Supply AGND 13, 17 Analog Ground Copyright © 2008–2015, Texas Instruments Incorporated Pin Configuration and Functions 9 Submit Documentation Feedback Product Folder Links: DP83848H DP83848J DP83848K DP83848M DP83848T |
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