PCM1798

SLES102 – DECEMBER 2003

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15

AUDIO DATA INTERFACE

Audio Serial Interface

The audio interface port is a 3-wire serial port. It includes LRCK (pin 4), BCK (pin 6), and DATA (pin 5). BCK is the

serial audio bit clock, and it is used to clock the serial data present on DATA into the serial shift register of the audio

interface. Serial data is clocked into the PCM1798 on the rising edge of BCK. LRCK is the serial audio left/right word

clock.

The PCM1798 requires the synchronization of LRCK and the system clock, but does not need a specific phase

relation between LRCK and the system clock.

If the relationship between LRCK and the system clock changes more than

±6 BCK, internal operation is initialized

system clock is completed.

PCM Audio Data Formats and Timing

left-justified. The data formats are shown in Figure 22. Data formats are selected using FMT0 (pin 11) and FMT1

(pin 12) as shown in Table 2. All formats require binary twos-complement, MSB-first audio data. Figure 21 shows

a detailed timing diagram for the serial audio interface.

DATA

t(BCH)

1.4 V

BCK

LRCK

t(BCL)

t(LB)

t(BCY)

t(DS)

t(DH)

1.4 V

1.4 V

t(BL)

PARAMETERS

MIN

MAX

UNITS

t(BCY)

BCK pulse cycle time

70

ns

t(BCL)

BCK pulse duration, LOW

30

ns

t(BCH)

BCK pulse duration, HIGH

30

ns

t(BL)

BCK rising edge to LRCK edge

10

ns

t(LB)

LRCK edge to BCK rising edge

10

ns

t(DS)

DATA setup time

10

ns

t(DH)

DATA hold time

10

ns

—

LRCK clock data

50%

± 2 bit clocks

Figure 21. Timing of Audio Interface