DP8459 datasheet(19/35 Pages) NSC

19 / 35 page

FIGURE 17. DP8459 in a Typical System Conﬁguration

System constraints:

NRZ DATA = 10 Mbit/sec

VCO = 20 MHz

REFERENCE CLOCK = 20 MHz

Code type = 1⁄2 (2, 7)

min = 3 (highest recorded frequency)

max = 8 (lowest recorded frequency)

preamble = 4(fpreamble = 5 MHz)

Preamble Length = 11 NRZ bytes (ESDI min.) = 8.8 µs

(44 recorded pulses)

Disk formatting = pseudo hard sectored

The DP8459 provides a zero phase start function which

minimizes the initial phase step encountered at the start of

preamble lock acquisition and thus the phase stabilization time

within the preamble is signiﬁcantly reduced with respect to a

fully random-phase lock sequence. However, the PLL will

encounter a ﬁnite frequency step at the start of preamble

acquisition due to variations in disk rotational velocity which

may be as large as ±1% (more pronounced in exchangable

media systems). The lock-in range of the PLL at the time of

preamble acquisition must then be at least ±0.01 x f

preamble.

Given that the PLL lock sequence involves only an adjustment

to a frequency step, the following requirements will be set for

ﬁnal PLL dynamics within the ﬁlter design procedure:

1. Residual phase error

e at the end of the preamble (a full 11

NRZ bytes allowed for PLL stabilization) will be 2 ns or less

(4% of the total synchronization window).

2. The lock-in range

∆ω

L must be at least 1.5 times the

expected frequency step range.

3. The minimum 3 dB bandwidth

−3 dB in the data ﬁeld must

be twice the expected maximum mechanical vibration

frequency (10 kHz).

4. The natural frequency of the loop

n and damping ratio ζ

will be minimized in the data ﬁeld in order to achieve a high

level of jitter rejection. (Minimum damping ratio

ζ will be 0.5

(phase margin of 52

˚) for adequate stability).

5. Re-lock time to the REFERENCE CLOCK will be

minimized.

First,

some

deﬁnitions

will

established.

Regarding

requirement #1, the equations for phase error due to a

frequency step are

e(t) = [ ∆ω/ωn] [1/(1–ζ

2)0.5 sin(1−

ζ2)0.5ω

nt]exp(

−

ζω

nt) for ζ <

e(t) = [ ∆ω/ωn][ωnt]exp(−ωnt) for ζ = 1;

e(t) = [∆ω/ωn] [1/(ζ

2 −1)0.5 sinh (

ζ2 −1)0.5 ω

nt] x exp(−ζωnt)

for

ζ>1.

These equations are plotted in

Figure 18 . The equations for

phase error due to a phase step are

e(t) = ∆θ{ cos (1−ζ

2)0.5

−[

ζ/(1−ζ2)0.5] sin (1−ζ2)0.5 ωnt} exp(−ζω

nt) for ζ<1;

TL/F/9322-19

http:\\www.national.com

PrintDate=1996/07/31 PrintTime=11:06:03 ds009322 Rev. No. 1

Proof

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