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PCF8575CDGVR 데이터시트(PDF) 3 Page - Texas Instruments

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부품명 PCF8575CDGVR
상세설명  SMBus Low-Power I/O Expander
PDF  38 Pages
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI1 - Texas Instruments

PCF8575CDGVR 데이터시트(HTML) 3 Page - Texas Instruments

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DB, DBQ, DGV, DW, OR PW PACKAGE
(TOP VIEW)
INT
A1
A2
P00
P01
P02
P03
P04
P05
P06
P07
GND
VCC
SDA
SCL
A0
P17
P16
P15
P14
P13
P12
P11
P10
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
24 23 22 21 20
7
8
9 10 11
1
2
3
4
5
6
18
17
16
15
14
13
RGE PACKAGE
(TOP VIEW)
19
12
P00
P01
P03
P03
P04
P05
A0
P17
P16
P15
P14
P13
PCF8575C
www.ti.com
SCPS123F – MARCH 2005 – REVISED JANUARY 2015
5 Pin Configuration
Pin Functions
PIN
TYPE
NAME
NO.
DESCRIPTION
DB, DBQ, DGV,
RGE
DW, AND PW
INT
1
22
I
Interrupt output. Connect to VCC through a pullup resistor.
A1
2
23
I
Address input 1. Connect directly to VCC or ground. Pullup resistors are not needed.
A2
3
24
I
Address input 2. Connect directly to VCC or ground. Pullup resistors are not needed.
P00
4
1
I/O
P-port input/output. Open-drain design structure. Connect to VCC through a pullup resistor.
P01
5
2
I/O
P-port input/output. Open-drain design structure. Connect to VCC through a pullup resistor.
P02
6
3
I/O
P-port input/output. Open-drain design structure. Connect to VCC through a pullup resistor.
P03
7
4
I/O
P-port input/output. Open-drain design structure. Connect to VCC through a pullup resistor.
P04
8
5
I/O
P-port input/output. Open-drain design structure. Connect to VCC through a pullup resistor.
P05
9
6
I/O
P-port input/output. Open-drain design structure. Connect to VCC through a pullup resistor.
P06
10
7
I/O
P-port input/output. Open-drain design structure. Connect to VCC through a pullup resistor.
P07
11
8
I/O
P-port input/output. Open-drain design structure. Connect to VCC through a pullup resistor.
GND
12
9
—
Ground
P10
13
10
I/O
P-port input/output. Open-drain design structure. Connect to VCC through a pullup resistor.
P11
14
11
I/O
P-port input/output. Open-drain design structure. Connect to VCC through a pullup resistor.
P12
15
12
I/O
P-port input/output. Open-drain design structure. Connect to VCC through a pullup resistor.
P13
16
13
I/O
P-port input/output. Open-drain design structure. Connect to VCC through a pullup resistor.
P14
17
14
I/O
P-port input/output. Open-drain design structure. Connect to VCC through a pullup resistor.
P15
18
15
I/O
P-port input/output. Open-drain design structure. Connect to VCC through a pullup resistor.
P16
19
16
I/O
P-port input/output. Open-drain design structure. Connect to VCC through a pullup resistor.
P17
20
17
I/O
P-port input/output. Open-drain design structure. Connect to VCC through a pullup resistor.
A0
21
18
I
Address input 0. Connect directly to VCC or ground. Pullup resistors are not needed.
SCL
22
19
I
Serial clock line. Connect to VCC through a pullup resistor
SDA
23
20
I/O
Serial data line. Connect to VCC through a pullup resistor.
VCC
24
21
—
Supply voltage
Copyright © 2005–2015, Texas Instruments Incorporated
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