TMS570LS3134 datasheet(47/167 Pages) TI1

47 / 167 page

VCCIO

VOH

VOL

Output

TMS570LS3134, TMS570LS2134, TMS570LS2124

www.ti.com

SPNS165B – APRIL 2012 – REVISED MAY 2015

Table 5-7. Switching Characteristics for Output Timings Versus Load Capacitance (CL) (continued)

PARAMETER

MIN

MAX

UNIT

CL = 15 pF

2.5

CL = 50 pF

Rise time, tr

CL = 100 pF

7.2

CL = 150 pF

12.5

8 mA mode

CL = 15 pF

2.5

CL = 50 pF

Fall time, tf

CL = 100 pF

7.2

CL = 150 pF

12.5

Selectable 8 mA/2 mA-z pins

(see Table 5-4)

CL = 15 pF

CL = 50 pF

Rise time, tr

CL = 100 pF

CL = 150 pF

2 mA-z mode

CL = 15 pF

CL = 50 pF

Fall time, tf

CL = 100 pF

CL = 150 pF

Figure 5-3. CMOS-Level Outputs

Table 5-8. Timing Requirements for Outputs(1)

MIN

MAX

UNIT

Delay between low-to-high, or high-to-low transition of general-purpose output

td(parallel_out)

signals that can be configured by an application in parallel, for example, all signals in

a GIOA port, or all N2HET1 signals, and so forth.

(1)

This specification does not account for any output buffer drive strength differences or any external capacitive loading differences. Check

Table 5-4 for output buffer drive strength information on each signal.

Specifications

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