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SI5341 데이터시트(PDF) 47 Page - Silicon Laboratories |
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SI5341 데이터시트(HTML) 47 Page - Silicon Laboratories |
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47 / 53 page ![]() Table 11.1. PCB Land Pattern Dimensions Dimension Si5341 (Max) Si5340 (Max) C1 8.90 6.90 C2 8.90 6.90 E 0.50 0.50 X1 0.30 0.30 Y1 0.85 0.85 X2 5.30 5.30 Y2 5.30 5.30 Notes: General 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. This Land Pattern Design is based on the IPC-7351 guidelines. 3. All dimensions shown are at Maximum Material Condition (MMC). Least Material Condition is calculated based on a fabrication Allowance of 0.05 mm. Solder Mask Design 1. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder mask and the metal pad is to be 60 µm minimum, all the way around the pad. Stencil Design 1. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used to assure good solder paste release. 2. The stencil thickness should be 0.125 mm (5 mils). 3. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads. 4. A 3×3 array of 1.25 mm square openings on 1.80 mm pitch should be used for the center ground pad. Card Assembly 1. A No-Clean, Type-3 solder paste is recommended. 2. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components. Si5341/40 Rev D Data Sheet PCB Land Pattern silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 46 |
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