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SI5341 데이터시트(PDF) 44 Page - Silicon Laboratories |
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SI5341 데이터시트(HTML) 44 Page - Silicon Laboratories |
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44 / 53 page ![]() 10. Package Outlines 10.1 Si5341 9x9 mm 64-QFN Package Diagram The figure below illustrates the package details for the Si5341. The table below lists the values for the dimensions shown in the illustra- tion. Figure 10.1. 64-Pin Quad Flat No-Lead (QFN) Table 10.1. Package Dimensions Dimension Min Nom Max A 0.80 0.85 0.90 A1 0.00 0.02 0.05 b 0.18 0.25 0.30 D 9.00 BSC D2 5.10 5.20 5.30 e 0.50 BSC E 9.00 BSC E2 5.10 5.20 5.30 L 0.30 0.40 0.50 aaa — — 0.15 bbb — — 0.10 ccc — — 0.08 ddd — — 0.10 eee — — 0.05 Notes: 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing per ANSI Y14.5M-1994. 3. This drawing conforms to the JEDEC Solid State Outline MO-220. 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components. Si5341/40 Rev D Data Sheet Package Outlines silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 43 |
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