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CDC5801 데이터시트(PDF) 13 Page - Texas Instruments

부품명 CDC5801
상세설명  LOW JITTER CLOCK MULTIPLIER AND DIVIDER WITH PROGRAMMABLE DELAY AND PHASE ALIGNMENT
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CDC5801 데이터시트(HTML) 13 Page - Texas Instruments

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CDC5801
LOW JITTER CLOCK MULTIPLIER AND DIVIDER WITH
PROGRAMMABLE DELAY AND PHASE ALIGNMENT
SCAS682A – OCTOBER 2002
13
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
MULT0 and/or MULT1
CLKOUT/
CLKOUTB
t(MULT)
Figure 7. MULT Transition Timings
STOPB
t(CLKOFF)
(see Note A)
t(ON)
t(STOP)
t(CLKSETL)
t(CLKON)
(see Note A)
Clock Output Settled
Within 50 ps of the
Phase Before Disabled
Clock Enabled
and Glitch Free
Output Clock
Not Specified
Glitches OK
CLKOUT/
CLKOUTB
NOTE A: Vref = VO ± 200 mV
Figure 8. STOPB Transition Timings



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