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CDC5801 데이터시트(PDF) 2 Page - Texas Instruments |
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CDC5801 데이터시트(HTML) 2 Page - Texas Instruments |
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2 / 16 page ![]() CDC5801 LOW JITTER CLOCK MULTIPLIER AND DIVIDER WITH PROGRAMMABLE DELAY AND PHASE ALIGNMENT SCAS682A – OCTOBER 2002 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Depending on the selection of the mode terminals (P0:2), the device behaves as a multiplier (by 4, 6, or 8) with the phase aligner bypassed or as a multiplier or divider with programmable delay and phase aligner functionality. Through the select terminals (P0:2) user can also bypass the phase aligner and the PLL (test mode) and output the REFCLK directly on the CLKOUT/CLKOUTB terminals. Through P0:2 terminals the outputs could be in a high impedance state. This device has another unique capability to be able to function with a wide band of voltages on the REFCLK terminal by varying the voltage on the VDDREF terminal. The CDC5801 device is characterized for operation over free-air temperatures of –40 °C to 85°C. |
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