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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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M38B53M4-059FP 데이터시트(PDF) 239 Page - Mitsubishi Electric Semiconductor |
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M38B53M4-059FP 데이터시트(HTML) 239 Page - Mitsubishi Electric Semiconductor |
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239 / 355 page  38B5 Group User’s Manual APPLICATION 2-151 2.11 Clock generating circuit 2.11 Clock generating circuit 2.11.1 Relevant register Figure 2.11.1 shows the structure of the CPU mode register. Fig. 2.11.1 Structure of CPU mode register CPU mode register b7 b6 b5 b4 b3 b2 b1 b0 CPU mode register (CPUM, CM: address 3B16) 00 : Single-chip mode 01 : 10 : Not available 11 : b 0 1 2 3 4 5 6 7 Name 0 Functions At reset R W 0 0 : Page 0 1 : Page 1 0 0: Low drive 1: High drive 1 0 0: Oscillating 1: Stopped 0 1 0 Processor mode bits Stack page selection bit XCOUT drivability selection bit Port Xc switch bit Main clock (XIN- XOUT) stop bit Main clock division ratio selection bit Internal system clock selection bit b1 b0 0: f(XIN) (high-speed mode) 1: f(XIN)/4 (middle-speed mode) 0: XIN–XOUT selection (middle-/high-speed mode) 1: XCIN–XCOUT selection (low-speed mode) 0: I/O port function 1: XCIN-XCOUT oscillation function |
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