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TVP7002IPZP 데이터시트(PDF) 21 Page - Texas Instruments

부품명 TVP7002IPZP
상세설명  TRIPLE 8-/10-BIT 165-/110-MSPS VIDEO AND GRAPHICS DIGITIZER WITH HORIZONTAL PLL
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TVP7002IPZP 데이터시트(HTML) 21 Page - Texas Instruments

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TVP7002
www.ti.com
SLES206C – MAY 2007 – REVISED APRIL 2013
Output Range Limits
The TVP7002 provides selectable output range limits in I2C subaddress 15h:
00 = RGB coding range (Y, Cb, and Cr range from 0 to 1023) (default)
01 = Extended coding range (Y, Cb, and Cr range from 4 to 1019)
10 = ITU-R BT.601 coding range (Y ranges from 64 to 940, Cb and Cr range from 64 to 960)
11 = Reserved
NOTE
RGB coding range not allowed with embedded syncs.
Power Management
The TVP7002 supports both automatic and manual power-down modes. The automatic power-down mode can
be selected by setting bit 2 of subaddress 0Fh to logic 0.
In the automatic power-down mode, the TVP7002 powers down the ADCs, the ADC reference, and horizontal
PLL when activity is not detected on both the selected HSYNC input and the selected SOG input (VSYNC is no
longer used). The TVP7002 restores power whenever activity is detected on either the selected HSYNC input or
the selected SOG input.
The TVP7002 can also be placed in power-down mode via the active-high PWDN input (pin 70). When the
PWDN input is driven high, the TVP7002 powers down everything including the I2C interface, and the digital
outputs are not placed in a high-impedance mode.
The TVP7002 can also be placed in a power-down mode using bit 1 of register 0Fh.
Individual blocks of the TVP7002 can be independently powered down using register 2Bh.
Copyright © 2007–2013, Texas Instruments Incorporated
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