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TVP7002IPZP 데이터시트(PDF) 9 Page - Texas Instruments

부품명 TVP7002IPZP
상세설명  TRIPLE 8-/10-BIT 165-/110-MSPS VIDEO AND GRAPHICS DIGITIZER WITH HORIZONTAL PLL
PDF  58 Pages
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제조업체  TI1 [Texas Instruments]
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TVP7002IPZP 데이터시트(HTML) 9 Page - Texas Instruments

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DATACLK
t1
t2
t3
Valid Data
R, G, B, HSOUT
Valid Data
V
OH
V
OL
CLK POL = 0
CLK POL = 1
TVP7002
www.ti.com
SLES206C – MAY 2007 – REVISED APRIL 2013
Timing Requirements
PARAMETER
TEST CONDITIONS(1)
MIN
TYP
MAX
UNIT
Clocks, Video Data, Sync Timing
Positive duty cycle, DATACLK (CLK POL = 0)
48
50
52
%
Positive duty cycle, DATACLK (CLK POL = 1)
41
43
45
%
t1
DATACLK rise time
10% to 90%
1
ns
t2
DATACLK fall time
90% to 10%
1
ns
t3 (RGB data)
RGB output delay time
0
1.5
ns
(1)
Measured at 162 MHz with 22-
Ω series termination resistor and 10-pF load. Specified by characterization only. Data is clocked out on
the rising edge of DATACLK with Reg 18h CLK POL=0 and is clocked out on the falling edge of DATACLK with CLK POL=1.
Figure 1. Clock, Video Data, and HSOUT Timing
Copyright © 2007–2013, Texas Instruments Incorporated
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