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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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CS8415A-CS 데이터시트(PDF) 10 Page - Cirrus Logic |
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CS8415A-CS 데이터시트(HTML) 10 Page - Cirrus Logic |
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10 / 42 page  CS8415A 10 2. TYPICAL CONNECTION DIAGRAM RXP0 RXN0 AES3/ SPDIF Sources Clock Control RMCK Hardware Control RST RERR EMPH 3-wire Serial Audio Input Device OLRCK OSCLK SDOUT SDA/CDOUT AD0/CS SCL/CCLK AD1/CDIN U INT VA+ V L+ Ferrite * Bead +5V Analog Supply * Digital Supply 0.1 F µ 0.1 F µ * A separate analog supply is only necessary in applications where RMCK is used for a jitter sensitive task. For applications where RMCK is not used for a jitter sensitive task, connect VA+ to VD+ via a ferrite bead. Keep the decoupling capacitor between VA+ and AGND. DGND FILT AGND RFILT CFILT CRIP H/S DGND2 RXP1 RXP2 RXP3 RXP4 RXP5 RXP6 CS8415A +3.3V or +5V ** ** Please see section 5.1 "7:1 S/PDIF Input Multiplexer" and Appendix A for typical input configurations and recommended input circuits. A2 D / Microcontroller Figure 5. Recommended Connection Diagram for Software Mode |
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