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CS8415A-CS 데이터시트(PDF) 42 Page - Cirrus Logic

부품명 CS8415A-CS
상세설명  96 kHz DIGITAL AUDIO INTERFACE RECEIVER
PDF  42 Pages
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제조업체  CIRRUS [Cirrus Logic]
홈페이지  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS8415A-CS 데이터시트(HTML) 42 Page - Cirrus Logic

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CS8415A
42
16.2.4
Component Value Selection
The external PLL component values are listed in
Table 4.
16.2.5
Jitter Attenuation
Shown in Figure 19 is the jitter attenuation plot
when used with the 36-96kHz PLL component val-
ues.
The AES3 and IEC60958-4 specifications
state a maximum of 2dB jitter gain or peaking.
Fs Range RFILT (kΩ)CFILT (µF) CRIP (nF) PLL Lock Time (ms)
8 - 96
0.909
1.8
33
56
32 - 96
3.0
0.047
2.2
60
Table 4. External PLL Component Values
Figure 19. Jitter Attenuation Characteristics of PLL with Fs=32 to 96 kHz Filter Components
10
−1
10
0
10
1
10
2
10
3
10
4
10
5
−20
−15
−10
−5
0
5
Jitter Frequency (Hz)



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