PC87310 datasheet(9/52 Pages) NSC

9 / 52 page

20 Pin Descriptions (Continued)

Pin Symbol

Pin Number

Description

GPEN

(Game Port Enable)

This multi-function output provides an active low signal if IO address

201 hex is selected and the XTSEL pin was high during reset It can be

used as a decoded chip select for external logic that implements the

game port function in an AT system (See GRD and XTSEL for additional

details about the operation of this pin)

GRD

(Game Read)

This multi-function output provides an active low signal if IO address

201 hex is selected the read pin is low and the XTSEL pin was low

during reset It can be used as a decoded read signal for external logic

that implements the game port function in an XT system (See GPEN

and XTSEL for additional details about the operation of this pin)

GWR

(Game Write)

This multi-function output provides an active low signal if IO address

201 hex is selected the write pin is low and the XTSEL pin was low

during reset It can be used as a decoded write signal for external logic

that implements the game port function in an XT system (See HCS1

and CPPE for additional details about the operation of this pin)

HSC0 1

16 17

These dual and multi-function outputs provide a hard disk enable signal

(Hard Disk Chip Select)

when the addresses shown in Table 1-1 are present on A0 – A9 during a

read or write access Using minimal hardware these signals will control

and interface between the CPU and a hard disk drive that has a

controller HSC0 is always used for this function after reset HSC1 can

be used for this function after reset if XTSEL was high during reset

(See CRB6 GWR and CRPE for further information on these pins and

Table 1-1)

HDSEL

(Head Select)

This output determines which disk drive head is active Low e Head 1

Open (high) e Head 0 This is a high drive open drain output

IOL

(IO Address Low)

This input pin should be driven low by external decode logic when all IO

address bits 10 – 15 are low This signal is gated inside the PC87310 to

ensure that the IO bus is fully decoded

INIT

(Initialize)

This output initializes the printer when it is low This pin will be in a

TRI-STATE condition 10 ns after a one is loaded into the corresponding

Control Register bit position The system should pull this pin high using a

47 kX resistor

INDEX

This active low Schmitt input signals the beginning of a track

IRQ3 4

40 58

These outputs signal serial port interrupts The appropriate interrupt

(Interrupt Request 3 4)

goes high whenever it is enabled via the IER and any of the following

serial interrupt conditions are active Receiver Error Flag set Receiver

Data Available Transmitter Holding Register Empty or Modem Status

set The interrupt is reset low after the appropriate interrupt service

disabling through IER or a Master Reset IRQ4 presents the interrupt

signal if the serial channel is designated COM1 IRQ3 presents the

interrupt signal if the serial channel is designated COM2 Both IRQ3 and

IRQ4 can be disabled by resetting OUT 2 low

IRQ6

(Interrupt Request 6)

Active high output to signal that a floppy disk controller operation

requires the attention of the microprocessor The action required

depends on the current function of the controller This signal is enabled

when D3 of the Drive Control Register is set

IRQ7

(Interrupt Request 7)

This output signals parallel port interrupts When enabled (Control

signal input

(Master Reset)

When this input is high it clears all registers except the parallel port

data and status registers the UART Receiver Buffer Transmitter

Holding and Divisor Latch Registers In the floppy disk controller it

resets all disk drive output lines to their disabled state Reset clears the

Drive Control Register sets the Data Rate Register to 250 kbs and

sets the Main Status Register to 80 The Mode register default values

are given in the Mode Register description To prevent glitches from

activating the reset sequence attach a 1000 pF capacitor to this pin

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