PC87310 datasheet(10/52 Pages) NSC

10 / 52 page

20 Pin Descriptions (Continued)

Pin Symbol

Pin Number

Description

MTR0 1

(Motor)

95 94

These are active low motor enable outputs for drive 0 and drive 1 This is

a high drive open drain output These pins contain encoded drive select

information if bit 7 of the Configuration Register is set (see Configuration

controlled through bits in the Drive Control Register

OSC1

(Oscillator)

One side of an external 24 MHz crystal is attached here This pin is tied

low if an external clock is used

OSC2CLK

(OscillatorClock)

One side of the external 24 MHz crystal is attached here If a crystal is

not used a TTL or CMOS compatible clock is connected to this pin

PD0 – PD7

(Port Data)

26 – 19

These bidirectional pins transfer data to and from the peripheral data

bus These pins have high current drive capability (See DC Electrical

Characteristics)

(Paper End)

This input is set high by the printer when it is out of paper

POE

(Port Output Enable)

When this input is low data written to the parallel port data register is

output through PD0 – PD7 When this input is high PD0 – PD7 are in a

high impedance state and act as inputs This pin is usually tied low for

printer operation

PUMPPREN

When the PU bit is set in Mode Command this pin is an output that

(PumpPrecompensation Enable)

indicates when the charge pump is making a correction Otherwise this

pin is an input that sets the precomp mode as shown in Table 4-13 If pin

is configured as PUMP PREN is assumed high

(Read)

When this input is low while the chip is selected the CPU can read

status information or data from the selected register

RDATA

(Read Data)

The active low raw data read from the disk is connected here This is a

Schmitt input

RI1 2

(Ring Indicator)

50 49

When low this input indicates that a telephone ringing signal has been

received by the MODEM or data set The RI signal is a MODEM status

input whose condition the CPU can test by reading bit 6 (RI) of the

MODEM Status Register Bit 6 is the complement of the RI signal Bit 2

(TERI) of the MODEM Status Register indicates whether the RI input

signal has changed from a low to a high state since the previous reading

of the MODEM Status Register

Note

Whenever the RI bit of the MODEM Status Register changes from a high to a low

state an interrupt is generated if the MODEM Status Interrupt is enabled

RPMLC

This high drive open drain output pin has two functions based on the

(Revolutions per MinuteLow Current)

selection of the DRVTYP pin

1 When using a dual speed spindle motor floppy drive (DRVTYP pin

low) this output is used to select the spindle motor speed either 300

RPM or 360 RPM In this mode this output goes low when 250300 kb

data rate is chosen in the data rate register and high when 500 kbs is

chosen

2 When using single speed spindle motor floppy drive (DRVTYP pin

high) this pin indicates when to reduce the write current to the drive

This output is high for high density media (when 500 kbs is chosen)

RTS1 2

55 43

When low this output indicates to the MODEM or data set that the

(Request to Send)

UART is ready to exchange data The RTS output signal can be set to

an active low by programming bit 1 (RTS) of the MODEM Control

state Loop mode operation holds this signal in its inactive state if the

XTSEL is high during reset If the XTSEL pin is low during reset MCR bit

1 controls the associated pin during loop mode operation (See CRB4

and CRB1 for further information on these pins)

SETCUR

(Set Current)

An external resistor connected from this pin to analog ground programs

the amount of charge pump current that drives the external filters The

PLL Filter Design section shows how to determine the values

SIN1 2

(Serial Input)

56 42

This input receives composite serial data from the communications link

(peripheral device MODEM or data set)

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