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MCP19124-E/MJ 데이터시트(PDF) 92 Page - Microchip Technology

부품명 MCP19124-E/MJ
상세설명  Digitally-Enhanced Power Analog Synchronous Low-Side Dual-Loop PWM Controller
PDF  236 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP19124-E/MJ 데이터시트(HTML) 92 Page - Microchip Technology

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MCP19124/5
DS20005619A-page 92
 2016 Microchip Technology Inc.
FIGURE 13-1:
INTERRUPT LOGIC
FIGURE 13-2:
INT PIN INTERRUPT TIMING
TMR1IF
TMR1IE
SSPIF
SSPIE
IOCF
IOCE
INTF
INTE
GIE
PEIE
Wake-Up (if in Sleep mode)
Interrupt to CPU
PEIF
ADIF
ADIE
CDSIF
CDSIE
OTIF
OTIE
OVIF
OVIE
DRUVIF
DRUVIE
BCLIF
BCLIE
TMR2F
TMR2E
T0IF
T0IE
Plx2
UVLOIF
UVLOIE
OVLOIF
OVLOIE
Plx1
CC2IF
CC2IE
CC1IF
CC1IE
INTCON
Q2
Q1
Q3 Q4
Q2
Q1
Q3 Q4
Q2
Q1
Q3 Q4
Q2
Q1
Q3 Q4
Q2
Q1
Q3 Q4
CLKIN
INT pin
INTF flag
(INTCON reg.)
GIE bit
(INTCON reg.)
INSTRUCTION FLOW
PC
Instruction
Fetched
Instruction
Executed
PC
PC + 1
PC + 1
0004h
0005h
Inst (0004h)
Inst (0005h)
Dummy Cycle
Inst (PC)
Inst (PC + 1)
Inst (PC – 1)
Inst (0004h)
Dummy Cycle
Inst (PC)
—
Note 1: CLKOUT is available only in INTOSC and RC Oscillator modes.
2: For minimum width of INT pulse, refer to AC specifications in Section 5.0 “Digital Electrical Charac-
teristics”.
3: INTF flag is sampled here (every Q1).
4: INTF is enabled to be set any time during the Q4-Q1 cycles.
5: Asynchronous interrupt latency = 3-4 TCY. Synchronous latency = 3 TCY, where TCY = instruction cycle
time. Latency is the same whether Inst (PC) is a single-cycle or a two-cycle instruction.
CLKOUT (1)
(2)
(3)
(4)
(3)
Interrupt Latency (5)



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