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LAN8740 데이터시트(PDF) 28 Page - Microchip Technology

부품명 LAN8740
상세설명  Small Footprint MII/RMII 10/100 Energy Efficient Ethernet Transceiver with HP Auto-MDIX and flexPWR짰 Technology
PDF  136 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
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LAN8740 데이터시트(HTML) 28 Page - Microchip Technology

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LAN8740A/LAN8740Ai
DS00001987A-page 28
2013-2015 Microchip Technology Inc.
3.4.3
MII VS. RMII CONFIGURATION
The device must be configured to support the MII or RMII bus for connectivity to the MAC. This configuration is done
via the RMIISEL configuration strap. MII or RMII mode selection is configured based on the strapping of the RMIISEL
configuration strap as described in Section 3.7.3, "RMIISEL: MII/RMII Mode Configuration". Additionally, the MII/RMII
interface can be disabled (outputs driven low) via the Interface Disable bit of the Wakeup Control and Status Register
(WUCSR).
Most of the MII and RMII pins are multiplexed. Table 3-2, "MII/RMII Signal Mapping" describes the relationship of the
related device pins to the MII and RMII mode signal names.
Note 1: The RXER signal is optional on the RMII bus. This signal is required by the transceiver, but it is optional for
the MAC. The MAC can choose to ignore or not use this signal.
2: In RMII mode, this pin needs to be tied to VSS.
TABLE 3-2:
MII/RMII SIGNAL MAPPING
Pin Name
MII Mode
RMII Mode
TXD0
TXD0
TXD0
TXD1
TXD1
TXD1
TXEN
TXEN
TXEN
RXER/
RXD4/PHYAD0
RXER
RXER
(see Note 1)
COL/CRS_DV/MODE2
COL
CRS_DV
RXD0/MODE0
RXD0
RXD0
RXD1/MODE1
RXD1
RXD1
TXD2
TXD2
(see Note 2)
TXD3
TXD3
(see Note 2)
nINT/TXER/TXD4
TXER/
TXD4
CRS
CRS
RXDV
RXDV
RXD2/RMIISEL
RXD2
RXD3/PHYAD2
RXD3
TXCLK
TXCLK
RXCLK/PHYAD1
RXCLK
XTAL1/CLKIN
XTAL1/CLKIN
REF_CLK



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