| 전자부품 데이터시트 검색엔진 |
|
CS86 데이터시트(PDF) 3 Page - fujitsu semiconductor |
|
|
|||||||||||||||||||||||||||||
CS86 데이터시트(HTML) 3 Page - fujitsu semiconductor |
|
3 / 16 page ![]() CS86 Series 3 s MACRO LIBRARY (Including macros being prepared) 1. Logic cells 2. IP macro • Adder • AND-OR • AND-OR Inverter • Decoder • Clock Buffer • NON-Scan Flip Flop • Latch • Inverter • NAND • Buffer • AND • OR-AND Inverter • NOR • OR • OR-AND • Delay Buffer • Scan Flip Flop • Selector • ENOR • EOR • Boundary Scan Register • Dummy Clock Buffer • Bus Driver • Others CPU FR-V, ARM9, and others. DSP Communications DSP, DSP for Digital AV, and others. Peripheral Macro Interval timer, Interruption controller, DMA controller, RTC, Calender, UART, and others. Interface macro PCI, IEEE1394, USB 2.0, IrDA, and others. Multimedia processing macros JPEG, MPEG 4.0, and others. Mixed signal macros ADC, DAC, OPAMP, and others. Compiled macros RAM (1 port, 2 port) , ROM, Delay Line, Register file, and others. PLL Analog PLL I/O macro Compatible with various interface levels between 1.1 V and 5 V; SSTL2, PCI, P-CML, T-LVTTL, USB, IEEE1394, and others. |
|
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |