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WM8756 데이터시트(PDF) 18 Page - Wolfson Microelectronics plc

부품명 WM8756
상세설명  192KHZ SIX CHANNEL SACD COMPATIBLE AUDIO DAC
PDF  39 Pages
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제조업체  WOLFSON [Wolfson Microelectronics plc]
홈페이지  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8756 데이터시트(HTML) 18 Page - Wolfson Microelectronics plc

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WM8756
Advance Information
AI Rev 1.3 October 2001
18
SOFTWARE CONTROL MODES
DIGITAL AUDIO INTERFACE CONTROL REGISTERS
Interface format is selected via the FMT[1:0] register bits:
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
0000011
Interface Control
1:0
FMT[1:0]
00
Interface format Select
00 : right justified mode
01: left justified mode
10: I2S mode
11: DSP (early or late) mode
In left justified, right justified or I2S modes, the LRP register bit controls the polarity of LRCIN. If this bit is
set high, the expected polarity of LRCIN will be the opposite of that shown in Figure 6, Figure 7 and
Figure 8. Note that if this feature is used as a means of swapping the left and right channels, a 1 sample
phase difference will be introduced.
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
0000011
Interface Control
2
LRP
0
LRCIN Polarity
0 : normal LRCIN polarity
1: inverted LRCIN polarity
In DSP modes, the LRCIN register bit is used to select between early and late modes:
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
0000011
Interface Control
2
LRP
0
DSP Format
0 : Early DSP mode
1: Late DSP mode
By default, LRCIN and DIN0/1/2 are sampled on the rising edge of BCKIN and should ideally change on
the falling edge. Data sources which change LRCIN and DIN0/1/2 on the rising edge of BCKIN can be
supported by setting the BCP register bit. Setting BCP to 1 inverts the polarity of BCKIN to the inverse of
that shown in Figures 6, 7 and 8.
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
0000011
Interface Control
3
BCP
0
BCKIN Polarity
0 : normal BCKIN polarity
1: inverted BCKIN polarity
The IWL[1:0] bits are used to control the input word length.
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
0000011
Interface Control
5:4
IWL[1:0]
10
Input Word Length
00 : 16 bit data
01: 20 bit data
10: 24 bit data
11: 32 bit data
Note: If 32-bit mode is selected in right justified mode, the WM8756 defaults to 24 bits.
In all modes, the data is signed 2's complement. The digital filters always input 24-bit data. If the DAC is
programmed to receive 16 or 20 bit data, the WM8756 pads the unused LSBs with zeros. If the DAC is
programmed into 32 bit mode, the 8 LSBs are ignored.



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