2.7.3 RF_PD — RF Synthesizer Power Down

Activation of the RF Synthesizer power down bit results in the disabling of the respective N divider and de-biasing of its respective

Fin inputs (to a high impedance state). The respective R divider functionality also becomes disabled when the power down bit is

activated. The OSCinRF pin reverts to a high impedance state when both RF and IF power down bits are asserted. Power down

forces the respective charge pump and phase comparator logic to a TRI-STATE condition. The MICROWIRE control register

remains active and capable of loading and latching in data during all of the power down modes.

Both synchronous and asynchronous power down modes are available with the LMX2364 in order to adapt to different types of

applications. The power down mode bit R6[8] is used to select between synchronous and asynchronous power down. The

MICROWIRE control register remains active and capable of loading and latching in data in either power down mode.

Synchronous Power down Mode: The RF synthesizer can be synchronously powered down by first setting the power down

mode bit HIGH (R6[8] = 1) and then asserting its power down bit (R4[23] = 1). The power down function is gated by the charge

pump. Once the power down bit is loaded, the part will go into power down mode upon the completion of a charge pump pulse

event.

Asynchronous Power down Mode: The RF synthesizer can be asynchronously powered down by first setting the power down

mode bit LOW (R6[8] = 0) and then asserting its power down bit (R4[23]] = 1). The power down function is NOT gated by the

charge pump. Once the power down bit is loaded, the part will go into power down mode immediately

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