AD9528 datasheet(13/68 Pages) AD

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AD9528

Data Sheet

Rev. C | Page 12 of 67

CLOCK OUTPUT ADDITIVE TIME JITTER (BUFFER MODE)

Table 14.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

OUTPUT ADDITIVE RMS TIME JITTER

Application examples are based on typical performance (see

Table 2) using an external 122.88 MHz source driving VCXO

inputs (distribution section only, does not include PLL and

VCO)

Buffer Mode

HSTL Output

Integrated BW = 200 kHz to 5 MHz

OUT = 122.88 MHz

Integrated BW = 200 kHz to 10 MHz

112

Integrated BW = 12 kHz to 20 MHz

145

Integrated BW = 10 kHz to 40 MHz

146

Integrated BW = 1 kHz to 40 MHz

132

Integrated BW = 1 MHz to 40 MHz

LVDS Output

Integrated BW = 200 kHz to 5 MHz

OUT = 122.88 MHz

101

Integrated BW = 200 kHz to 10 MHz

140

Integrated BW = 12 kHz to 20 MHz

187

Integrated BW = 10 kHz to 40 MHz

189

Integrated BW = 1 kHz to 40 MHz

176

Integrated BW = 1 MHz to 40 MHz

LOGIC INPUT PINS—RESET, REF_SEL, AND SYSREF_REQ

Table 15.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

VOLTAGE

Input High

1.3

Input Low

0.6

INPUT LOW CURRENT

µA

CAPACITANCE

RESET TIMING

Pulse Width Low

1.0

Inactive to Start of Register

Programming

2.5

STATUS OUTPUT PINS—STATUS0 AND STATUS1

Table 16.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

OUTPUT VOLTAGE

High

Low

0.02

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