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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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WTS701EM/T 데이터시트(PDF) 13 Page - Winbond |
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WTS701EM/T 데이터시트(HTML) 13 Page - Winbond |
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13 / 77 page  WTS701 Publication Release Date: May 2003 - 13 - Revision 3.09 7.2 PHYSICAL INTERFACE The following sections describe the physical pin properties and the timing associated with the physical interface to the device. Note that all input pins are 3V and 5V tolerant, except for the CS signal which is only 3V tolerant. 7.2.1 Clocking Requirements The WTS701 processor can receive its clock from either an external clock source or a crystal oscillator. The XTAL1 and XTAL2 pins provide the crystal interface to the device. The clock to the WTS701 processor is configured by a clock configuration register, which must be set by the host processor during the initialization phase. Figure 6 below shows how to connect the WTS701 to a crystal oscillator. An external clock can be connected to the WTS701 providing the clock source for the system, as shown in Figure 6. WTS701 XTAL1 XTAL2 WTS701 XTAL1 XTAL2 CLK IN X1 C1 C2 C1 = C2 = 15pF X1 = 24.576MHz Figure 6. Clock Generation. Suggested Crystal Specification: F = 24.576 MHz Fundamental Mode Operation CL = 16 pF ESR = 60 Ω maximum |
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