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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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LSM6DS0 데이터시트(PDF) 55 Page - STMicroelectronics |
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LSM6DS0 데이터시트(HTML) 55 Page - STMicroelectronics |
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55 / 59 page  DocID025604 Rev 3 55/59 LSM6DS0 Register description 59 Figure 22. Wait bit disabled Figure 23. Wait bit enabled • Wait bit = ‘0’ Interrupt disabled as soon as condition is no longer valid (ex: Rate value below threshold) Rate (dps) Rate Threshold 0 t(n) t(n) t(n) Interrupt Counter Duration Value “Wait” Disabled • Wait bit = ‘1’ Interrupt disabled after duration sample (sort of hysteresis) Rate (dps) Rate Threshold 0 t(n) t(n) t(n) Interrupt Counter Duration Value “Wait” Enabled Duration value is the same used to validate interrupt |
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