PC87303 datasheet(89/114 Pages) NSC

89 / 114 page

90 Keyboard Controller and Real-Time Clock (Continued)

When the port line is used as an output an active pull-up

technique is used (instead of a traditional pull-up resistor)

which turns on Q3 only when Q2 is off hence eliminating a

steady current flow

Open-Collector Outputs

In order to reduce the glue logic used in a PC-AT compatible

environment four dedicated open-collector outputs are pro-

vided KBCLK KBDAT MCLK and MDAT KBCLK is the

complement of P26 KBDAT is the complement of P27

MCLK is the complement of P23 MDAT is the complement

of P22 These four drivers can drive 16 mA making them

suitable for driving keyboard and mouse cables TEST0 and

TEST1 must be externally connected to KBCLK and KBDAT

in the PC-AT compatible applications

Test Inputs

TEST0 and TEST1 are two dedicated input pins Conditional

jump instructions directly check the level of these two pins

TEST1 also serves as the event counter input

Connection to the IO Expander

The number of keyboard controller IO pins can be expand-

ed by adding one or more 8243 IO Expander chips Each

IO expander offers 16 IO port pins designated as Port 4

5 6 and 7 The keyboard controller makes use of the P20 –

P24 and the Strobe pin to interface with the 8243

915 TimerCounter

The keyboard controller is equipped with an 8-bit counter

which can be used as a timer or an event counter

Figure 9-9 shows the two different clock sources for the

counter The clock source is selected by software

Timer Operation

The counter can be set to the timer operation mode by con-

necting its clock source to the internal timing generator The

clock frequency to the timer is equal to the oscillator fre-

quency divided by 480

The initial value of the timer is programmable After the tim-

er is started (by STRT T instruction) it counts up continu-

ously until it is stopped or the keyboard controller is reset

The Timer Overflow Flag is set when the count value over-

flows from FFh back to 00h The Timer Overflow Flag can

be tested by a conditional jump instruction (JTF) This in-

struction also resets the flag When the timer interrupt is

enabled an interrupt occurs when the timer overflows This

is discussed more detail in the interrupt section

Event Counter Operation

When the clock input of the counter is switched to the exter-

nal input (TEST1) it essentially becomes an event counter

The falling edge of the signal on the TEST1 pin causes the

counter to increment Timer Overflow Flag and Timer inter-

rupt operate in the same way as they do in the timer mode

916 Interrupts

The keyboard controller of the PC87303 provides 2 different

internal interrupts They are the Input Buffer Full (IBF) inter-

rupt and Timer Overflow interrupt These two interrupts can

be independently enabled or disabled by software Both of

them are disabled when the chip comes out from reset

TLC12074 – 44

FIGURE 9-9 Timing Generation and Timer Circuit

PC87303 데이터시트(PDF) 89 Page - National Semiconductor (TI)

PC87303 데이터시트(HTML) 89 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL