PC97307 datasheet(6/218 Pages) NSC

6 / 218 page

Table of Contents

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2.10.7

CS1 Configuration Register, Second Level Index 06h ................................................ 40

2.10.8

Reserved, Second Level Index 07h ............................................................................. 40

2.10.9

CS2 Base Address MSB Register, Second Level Index 08h ...................................... 40

2.10.10 CS2 Base Address LSB Register, Second Level Index 09h ....................................... 40

2.10.11 CS2 Configuration Register, Second Level Index 0Ah ................................................ 40

2.10.12 Reserved, Second Level Indexes 0Bh-0Fh ................................................................. 40

2.10.13 Not Accessible, Second Level Indexes 10h-FFh ......................................................... 40

2.11

CARD CONTROL REGISTER BITMAPS .................................................................................. 41

3.0

Keyboard (and Mouse) Controller (KBC) (Logical Devices 0 and 1)

3.1

SYSTEM ARCHITECTURE ....................................................................................................... 43

3.2

FUNCTIONAL OVERVIEW ....................................................................................................... 44

3.3

DEVICE CONFIGURATION ...................................................................................................... 44

3.3.1

I/O Address Space ...................................................................................................... 44

3.3.2

Interrupt Request Signals ............................................................................................ 44

3.3.3

KBC Clock ................................................................................................................... 45

3.3.4

Timer or Event Counter ............................................................................................... 46

3.4

EXTERNAL I/O INTERFACES .................................................................................................. 46

3.4.1

Keyboard and Mouse Interface ................................................................................... 46

3.4.2

General Purpose I/O Signals ....................................................................................... 46

3.5

INTERNAL KBC - PC87307/PC97307 INTERFACE ................................................................. 47

3.5.1

The KBC DBBOUT Register, Offset 60h, Read Only .................................................. 47

3.5.2

The KBC DBBIN Register, Offset 60h (F1 Clear) or 64h (F1 Set), Write Only ............ 47

3.5.3

The KBC STATUS Register, Offset 64h, Read Only ................................................... 48

3.6

INSTRUCTION TIMING ............................................................................................................. 48

4.0

Real-Time Clock (RTC) and Advanced Power Control (APC) (Logical Device 2)

4.1

RTC OPERATION OVERVIEW ................................................................................................. 49

4.1.1

RTC Hardware and Functional Description ................................................................. 49

4.1.2

Timekeeping ................................................................................................................ 50

4.1.3

Power Supply .............................................................................................................. 51

4.1.4

Interrupt Handling ........................................................................................................ 52

4.2

THE RTC REGISTERS ............................................................................................................. 52

4.2.1

RTC Control Register A (CRA), Index 0Ah .................................................................. 52

4.2.2

RTC Control Register B (CRB), Index 0Bh ................................................................. 54

4.2.3

RTC Control Register C (CRC), Index 0Ch ................................................................. 54

4.2.4

RTC Control Register D (CRD), Index 0Dh ................................................................. 55

4.3

APC OVERVIEW ....................................................................................................................... 55

4.3.1

User Selectable Parameters ........................................................................................ 55

4.3.2

System Power States .................................................................................................. 56

4.3.3

System Power Switching Logic ................................................................................... 56

4.4

DETAILED FUNCTIONAL DESCRIPTION ................................................................................ 58

4.4.1

The ONCTL Signal ...................................................................................................... 58

4.4.2

Entering Power States ................................................................................................. 58

4.4.3

System Power-Up and Power-Off Activation Event Description .................................. 59

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