PC97307 datasheet(77/218 Pages) NSC

77 / 218 page

The Digital Floppy Disk Controller (FDC) (Logical Device 3)

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The programmable FIFO threshold (THRESH) is useful in

adjusting the FDC to the speed of the system. A slow sys-

tem with a sluggish DMA transfer capability requires a high

value for THRESH. this gives the system more time to re-

spond to a data transfer service request (DRQ for DMA

mode or IRQ for interrupt mode). Conversely, a fast system

with quick response to a data transfer service request can

use a low value for THRESH.

FIGURE 5-12. FDC Data Register Bitmap

5.3.8

Digital Input Register (DIR), Offset 07h,

Read Operations

This read-only diagnostic register is used to detect the state

of the DSKCHG disk interface input signal and some diag-

nostic signals. DIR is unaffected by a software reset.

The bits of the DIR register function differently depending

on whether the FDC is operating in PC-AT drive mode or in

PS/2 drive mode. See Section 5.1.2 on page 66.

In PC-AT drive mode, bits 6 through 0 are in TRI-STATE to

prevent conflict with the status register of the hard disk at

the same address as the DIR.

FIGURE 5-13. DIR Register Bitmap, Read Operations,

PC-AT Drive Mode

76543210

Reset

Required

Data Register

(FIFO)

Offset 05h

Data

76543210

Reset

Required

Digital Input

Offset 07h

DSKCHG

Reserved, In TRI-STATE

Read Operations, PC-AT Drive Mode

FIGURE 5-14. DIR Register Bitmap, Read Operations,

PS/2 Drive Mode

Bit 0 - High Density (PS/2 Drive Mode Only)

In PC-AT drive mode, this bit is reserved, in TRI-STATE

and used by the status register of the hard disk.

In PS/2 drive mode, this bit indicates whether the data

transfer rate is high or low.

0 - The data transfer rate is high, i.e., 1 Mbps or 500

Kbps.

1 - The data transfer rate is low, i.e., 300 Kbps or 250

Kbps.

Bits 2,1 - Data Rata Select 1,0 (DRATE1,0)

(PS/2 Drive Mode Only)

In PC-AT drive mode, these bits are reserved, in TRI-

STATE and used by the status register of the hard disk.

In PS/2 drive mode, these bits indicate the status of the

DRATE1,0 bits programmed in DSR or CCR, whichever

is written last.

The significance of each value for these bits depends on

the supported speeds. See Table 5-6.

00 - Data transfer rate is 500 Kbps.

01 - Data transfer rate is 300 Kbps.

10 - Data transfer rate is 250 Kbps.

11 - Data transfer rate is 1 Mbps.

Bits 6-3 - Reserved

These bits are reserved and are always 1. In PC-AT

mode these bits are also in TRI-STATE. They are used

by the status register of the fixed hard disk.

Bit 7 - Disk Changed (DSKCHG)

This bit reflects the status of the DSKCHG disk interface

input signal.

During power down this bit is invalid, if it is read by the

software.

0 - DSKCHG is not active.

1 - DSKCHG is active.

76543210

Reset

Required

Digital Input

Offset 07h

DRATE1 Status

DSKCHG

DRATE0 Status

Reserved

High Density

Read Operations, PS/2 Drive Mode

PC97307 데이터시트(PDF) 77 Page - National Semiconductor (TI)

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