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PC97307 데이터시트(PDF) 184 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
부품명 PC97307
상세설명  PC87307/PC97307 Plug and Play Compatible and PC97 Compliant SuperI/O
PDF  218 Pages
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제조업체  NSC [National Semiconductor (TI)]
홈페이지  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC97307 데이터시트(HTML) 184 Page - National Semiconductor (TI)

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Device Description
www.national.com
13.2.2
Group 2
Pin List:
BUSY, PE, SLCT, WAIT
Output from SLCT, PE and BUSY is open-drain in all SPP modes, except in SPP Compatible mode when the setup mode
is ECP-based FIFO and bit 4 of the Control2 parallel port register is 1. (See Table 6-1 on page 112.) Otherwise, output from
these signals is level 2. External 4.7 K
Ω pull-up resistors should be used. PE is controlled by bit 2 of PP Confg0, and it is in
Group 2 only if bit 2 of PP Confg0 Register is “0”. See Section 6.5.19 on page 127.
All group 2 pins are back-drive protected.
TABLE 13-6. DC Characteristics of Group 2 Pins
13.2.3
Group 3
Pin List:
ACK, ERR, PE
Output from ACK and ERR is open-drain in all SPP modes, except in SPP Compatible mode when the setup mode is ECP-
based FIFO and bit 4 of the Control2 parallel port register is 1. (See Table 6-1 on page 112.) Otherwise, output from these
signals is level 2. External 4.7 K
Ω pull-up resistors should be used. PE is controlled by bit 2 of PP Confg0, and it is in
Group 2 only if bit 2 of PP Confg0 Register is “0”. See section 6.5.19 on page 127.
All group 3 pins are back-drive protected.
TABLE 13-7. DC Characteristics of Group 3 Pins
13.2.4
Group 4
Pin List:
MSEN1,0, SELCS
SELCS is a CMOS input pin.
TABLE 13-8. DC Characteristics of Group 4 Pins
a. Not tested. Guaranteed by design.
a. Not tested. Guaranteed by design.
a. Not tested. Guaranteed by design.
Symbol
Parameter
Conditions
Min
Max
Units
VIH
Input High Voltage
2.0
VDD
a
V
VIL
Input Low Voltage
−0.5 a
0.8
V
IIL
Input Leakage Current
VIN = VDD
120
µA
VIN = VSS
−10
µA
Symbol
Parameter
Conditions
Min
Max
Units
VIH
Input High Voltage
2.0
VDD
a
V
VIL
Input Low Voltage
−0.5 a
0.8
V
IIL
Input Leakage Current
VIN = VDD
10
µA
VIN = VSS
−250
µA
Symbol
Parameter
Conditions
Min
Max
Units
VIH
Input High Voltage
2.0
VDD
a
V
VIL
Input Low Voltage
−0.5 a
0.8
V
IIL
Input Leakage Current
During Reset: VIN = VDD
10
µA
VIN = VSS
−150
µA



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