PC87332VLJ datasheet(4/98 Pages) NSC

4 / 98 page

Table of Contents (Continued)

60 SERIAL PORTS

61 Serial Port Registers

62 Line Control Register (LCR)

63 Programmable Baud Rate Generator

64 Line Status Register (LSR)

65 FIFO Control Register

66 Interrupt Identification Register (IIR)

67 Interrupt Enable Register (IER)

68 MODEM Control Register (MCR)

69 MODEM Status Register (MSR)

610 Scratchpad Register (SCR)

70 PARALLEL PORT

71 Introduction

72 Data Register (DTR)

73 Status Register (STR)

74 Control Register (CTR)

75 Enhanced Parallel Port Operation

76 Extended Capabilities Parallel Port (ECP)

761 Introduction

762 Software Operation

77 Register Definitions

78 Software Controlled Data Transfer

(Modes 000 and 001)

79 Automatic Data Transfer (Modes 010 and 011)

791 Forward Direction (Bit 5 of DCRe0)

792 ECP (Forward) Write Cycle

793 Backward Direction (bit 5 of DCR is 1)

794 ECP (Backward) Read Cycle

710 FIFO Test Access (Mode 110)

711 Configuration Registers Access (Mode 111)

712 Interrupt Generation

80 INTEGRATED DEVICE ELECTRONICS

INTERFACE (IDE)

81 Introduction

82 IDE Signals

90 ELECTRICAL CHARACTERISTICS

91 DC Electrical Characteristics

92 DC Electrical Characteristics

93 AC Electrical Characteristics

931 AC Test Conditions

932 Clock Timing

933 Microprocessor Interface Timing

934 Baud Out Timing

935 Transmitter Timing

936 Receiver Timing

937 MODEM Control Timing

938 DMA Timing

939 Reset Timing

9310 Write Data Timing

9311 Drive Control Timing

9312 Read Data Timing

9313 IDE Timing

9314 Parallel Port Timing

9315 Enhanced Parallel Port Timing

9316 Extended Capabilities Port Timing

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