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LED7708 데이터시트(PDF) 38 Page - STMicroelectronics |
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LED7708 데이터시트(HTML) 38 Page - STMicroelectronics |
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38 / 53 page ![]() Recommended operating conditions LED7708 38/53 Doc ID 022698 Rev 1 If at least one bit of the CHSTA register is asserted after the error detection sequence, the XFLT pin is tied low. Both the CHSTA register and the XFLT pin are reset by clearing the DEN bit of DEVCFG0 or by performing a POR. 8.5.11 Internal registers initialization The internal registers show the following configuration after a POR. Table 18. CHSTA register Bit Position Attribute Meaning CHSTA0 to CHSTA15 0 Read only 0= The channel is working properly or is not used (the corresponding CHSEL bit is cleared) 1= The channel is open or an LED short-circuit has been detected during the error detection sequence 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Table 19. Default configuration of internal registers after POR Register Value (binary) DEVCFG0 0000 0000 0000 0010 DEVCFG1 0000 0000 0100 0000 GSLAT 0000 0000 0000 0000 BRTxx 0000 0000 0000 0000 CHSEL 0000 0000 0000 0000 CHSTA 0000 0000 0000 0000 |
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