LED7708 datasheet(45/53 Pages) STMICROELECTRONICS

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LED7708

Recommended operating conditions

Doc ID 022698 Rev 1

45/53

condition. Four options can be chosen by acting on the DTS1:DTS0 bits of the DEVCFG0

To prevent false triggering, the LED short-circuit detection is masked if the output voltage is

out of regulation (i.e. the OVRS bit of the DEVCFG0 is low). Each channel detected as faulty

(open or shorted) sets the corresponding bit of the CHSTA register.

The fault management algorithm can operate only if the channels are active and at a

minimum (10 µs typ.) PWM on-time is required at the outputs in order to detect the faulty

condition. After the detection of a “probably open channel”, the device begins to ramp-up the

output voltage, but this operation cannot be performed if the involved channel is turned off

(no feedback information available). In this case, the algorithm should wait until the channel

is turned on again, leading to a delayed output voltage steering because of the dimming

function. This situation can induce excessive power dissipation on the other channels (high-

voltage drop for a long period). To prevent this, the LED7708 automatically forces the

“probably open channel” to remain on (regardless of its programmed status) until the

maximum output voltage has been reached (confirmation of open channel fault) or the

output current has been recovered. Once the algorithm has recognized the open condition,

the faulty channel is excluded from the regulation loop and the output voltage is quickly

decreased to the optimal value in order to avoid excessive power dissipation (only if the

OCAD bit is asserted). Therefore, the open channel/LED-short fault detection algorithm can

operate in a transparent way without the need to stop the dimming function.

8.8

Special function

8.8.1

Current generators gain adjust

The gain of the current generators can be varied by changing the ADJ5:ADJ0 bits of the

DEVCFG1 register (64 steps). Two selectable ranges are provided by asserting/clearing the

current gain range selector (CGRS) bit of the DEVCFG1 register. After POR, the current

gain is unitary and can be changed according to the following formulas:

Equation 17

Equation 18

Equation 19

CGRS

0.5

--------

⋅

CGRS

0.75

0.25

-----------

⋅

ADJ5x2

ADJ4x2

ADJ3x2

ADJ2x2

ADJ1x2

ADJ0

+++

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